Summary
Overview
Work History
Education
Skills
Websites
Extracurricular Activities
Projects
Timeline
ANDREW HUYHUA

ANDREW HUYHUA

Rochester,NY

Summary

Motivated Computer Engineering student seeking a Summer/Fall 2026 Co-op to gain hands-on experience in embedded systems, software development, or data analytics, and to contribute to innovative, team-based engineering solutions.

Overview

5
5
years of professional experience

Work History

Cook/Food Server

Shah's Halal Food
01.2023 - Current
  • Prepared and assembled customer orders during peak rushes while accurately processing POS payments, maintaining consistent portioning/food quality.
  • Maintained cleanliness and resolved customer issues quickly, ensuring satisfaction in the restaurant.

B Double Caddie

Stanwich Country Club
06.2021 - 11.2023
  • Carried 2 bags at once and provided yardages, track balls, and maintained players' equipment between holes.
  • Built professional connections within the golf community and coordinated with golfers and staff.

Education

Bachelor of Science - Computer Engineering

Rochester Institute of Technology
05.2029
  • President Scholar
  • Dean's List: Fall 2025
  • Relevant Coursework: Digital Systems Design I & II, Circuits I & II, Digital Electronics, Computer Architecture, Computer Science (Java & Python)
  • GPA: 3.47

Skills

  • Python
  • Java
  • JavaScript
  • VHDL
  • Assembly(ARM & x86)
  • HTML/CSS
  • Angular API
  • Git
  • Keil uVision5
  • Quartus
  • QustaSim/ModelSim
  • LTSpice
  • GitHub/TortoiseSVN
  • Oscilloscopes

Extracurricular Activities

Society of Hispanic Professional Engineers (SHPE), 2023-09-01, Present RIT Volunteer of Tiger Stripes (Newman Catholic Community), 2023-08-01, Present

Projects

  • 32 Bit MIPS Processor, VHDL, Vivado, Artix-7 FPGA, 2026-01-01, Present, Developed a 5-stage pipelined 32-bit MIPS processor in VHDL with full support for R, I, and J-type instructions., ModelSim was used for simulation and debugging, while Vivado was used for synthesis and implementation before being deployed on an Artix-7 FPGA.
  • Serial Adder with Control Unit, VHDL, Quartus Prime, MAX 10 FPGA, 2025-04-01, 2025-04-30, Designed a serial-adder datapath (shift registers, full adder, carry D-FF) controlled by an FSM, tested through ModelSim testbench, and validated timing/state transitions., Verified on MAX 10 hardware using switches/LEDs and a slow PLL for observation.
  • "Tilt" Game Solver, Java, JavaFX, Algorithms, 2025-03-01, 2025-04-30, Built a Java puzzle solver that finds shortest tilt-move solutions while enforcing board constraints, implemented BFS with visited-state tracking, and added next-move hint generation., Created a JavaFX GUI for board visualization and step-by-step playback.
  • Software Engineering Final Project, Java, Angular, Team Project, 2024-08-01, 2024-12-31, Led a semester-long team project building a full-stack donation platform (Java Spring, Angular) using Scrum/OpenUP and file-based persistence.

Timeline

Cook/Food Server - Shah's Halal Food
01.2023 - Current
B Double Caddie - Stanwich Country Club
06.2021 - 11.2023
Rochester Institute of Technology - Bachelor of Science, Computer Engineering
ANDREW HUYHUA