Summary
Overview
Work History
Education
Skills
Certification
Timeline
TEACHING EXPERIENCE
HONORS & AWARDS
Generic

Mohammad Jundi

Newberry,FL

Summary

DC-DC power system designer. Experienced Analog Design Engineer with 10+ years in driving innovation in circuit design. Expert in LDO, Voltage Reference, Switching Regulators, analog TFM system.

Overview

1
1
Certificate
20
20
years of professional experience

Work History

SOC/Analog Engineer, Device Development Group

Intel Corporation
05.2005 - 11.2024
  • Part of the Power Delivery IP: FIVR Power System team which designed a synchronous 140 MHz multi-phase buck regulators. A successful product manufacturing integrated into 22nm processor die, and feature up to 80 MHz unity gain bandwidth.
  • Designed a VMC buck DC/DC converter 12V/1.2V with 10A output, Switching Frequency of 500kHz with Type III Compensator, using SIMPLIS. Designed a synchronous 20MHz VMC DC-DC buck converter 2.7V/1.2V with 600MA load, with 3-poles 2-zeros Compensator, using LTSPICE/SIMPLIS
  • Designed Innovative High-Voltage Regulator (LVR) with Wide Dynamic-Range and High PSRR, designed Precise Adaptive Voltage-Reference (VR) with Process-Tracking and Temperature-Compensation.
  • Designed global biasing generating ~40 current sources of 100uA thru current-routing.
  • Supported analog TFM system covered simulation methodology, parasitic estimation/extraction, Reliability flows, TSMC/Intel PDK collaterals.

Education

Master of Science - Computer Engineering w/Thesis

University Of Louisiana At Lafayette
Lafayette, LA
05.2006

Bachelor of Science - Electrical Engineering

University of Jordan
Amman Jordan
08.1999

Skills

  • Analog Circuit Design/PMIC
  • Simulation Software
  • Power Electronics
  • Technical Leadership

Certification

Santa Clara University PhD Electrical Engineering classes; 2014 GPA 3.87: Analog Integrated Circuits I & II, Adv RF Design, Adv Analog IC, RF Integrated Circuit Design, Transistor Models for IC Design, VLSI Design I, Mix Signals IC Design for Data Communication, Semiconductor Dev Theory I.

Timeline

SOC/Analog Engineer, Device Development Group

Intel Corporation
05.2005 - 11.2024

Master of Science - Computer Engineering w/Thesis

University Of Louisiana At Lafayette

Bachelor of Science - Electrical Engineering

University of Jordan

TEACHING EXPERIENCE

Research Assistant University of Louisiana: EECE 639: Advanced Topics in Computer Architecture Spring 2005

Teaching Assistant University of Louisiana: CMPS 260: Advanced Data Structures and Algorithms in C++ Fall 2004

HONORS & AWARDS

  • DDG Division Recognition Award; Intel TMG Excellence Award: Helped accelerating the tape-out of a 14nm test chip 7 weeks earlier than the previous generation, reducing the average physical design effort for SDP FUBs by 50%.
  • Intel TMG LTD Department Recognition; Intel TMG CDS/CCT Department Recognition award: Awarded four times for outstanding performance.
  • Full Scholarship in the Graduate School; BSc college scholarships and high school and for outstanding academic record.
Mohammad Jundi