Adithya Prakash

Specialized in designing power converters, including DC/DC converters and point-of-load solutions, with a strong emphasis on debugging. Demonstrated proficiency in TCAD/SPICE for power MOSFET modeling and adept in L-Edit and CADENCE for layout design. Solid understanding of semiconductor device physics and CMOS design fundamentals. Five years of practical experience in wafer fabrication, particularly in thin films and semiconductor devices.

• University of California Santa Cruz (Silicon Valley extension), Santa Clara, CA
• VLSI Engineering certification
• Digital logic design using Verilog Dec 2022
• Structural, dataflow and behavioral modeling in Verilog, including common constructs, considerations.
• Coding and testing of digital logic include examples of combinational circuits (gates, mux/demux, encoders/decoders etc), sequential circuits (flip-flops, registers, counters, RAM & ROM), and complex logic (ALU and FSM)
• Timing closure in Silicon IC design Jul 2023
• Hands-on experience in STA & Timing closure for block/chip to fix timing paths using Primetime/OpenROAD
• Solid comprehension of tool algorithms involving noise glitches, cross-talk delays, and margining using techniques such as OCV, AOCVM, and POCV

PhD Thesis: Deposition and Characterization Studies Of Boron Carbon Nitride (BCN) Thin Films Prepared By Dual Target Sputtering 2016 Aug, A thorough investigation of BCN as an Interlayer dielectric (ILD) in VLSI processes, a hard coating to various grinding and cutting tools (amongst the synthetically hardest material), an optical filter, a UV detector in harsh conditions, a prospective blue-green LEDs was investigated and its versatility as a next generation, inter-disciplinary super material was established., Design to implement pipelined adder, multiplier and loadable counter using Verilog for DSP application 2022 Dec, The loadable counter was designed for efficient counting of input data used in conjunction with the adder and multiplier modules. The final circuit is optimized for high performance and low power consumption, making it suitable for DSP applications., Random Access Memory (RAM) design using Verilog, implementing following architectures 2022 Dec, Synchronous write asynchronous read single port RAM, Synchronous write asynchronous read dual port RAM, Synchronous write synchronous read single port RAM, Universal Asynchronous Receiver/Transmitter (UART) realization using Verilog 2022 Dec, The transmitter circuit was implemented to perform parallel to conversion by adding a start bit, data bits, and a stop bit in that order and the data was sent bit by bit through a single pin. The receiver circuit was designed to read serial data to identify the start bit of a new transmission. Original data was reconstructed by reading the data bits and stop bit., Boron carbon nitride (BCN) based metal-insulator-metal UV detectors for harsh environment applications 2016 Aug, Metal-insulator-metal (MIM) structure using BCN with a good UV detection responsivity was implemented. BCN was demonstrated as a potential choice for a UV detector in extreme conditions since it is one of the hardest and most robust materials., GaAs/AlGaAs Light Emitting Diode (LED) fabrication & testing 2015 Oct, A red (626nm) LED was fabricated by using double hetero-structure. The hetero-structure was fabricated using MBE technique. Aluminum was used to vary the band energy & refractive index in the GaAs lattice. On n side Ni/Ge/Au (50/200/2000 Å) and on p-side Ti/Pt/Au (200/400/2000 Å) were deposited, and I-V characterization was performed. A distinct red light was observed during the I-V measurements., Design of 16X16 6T SRAM using CADANCE 2014 Apr, Synthesis, Schematics, layout drawing was performed, and back annotation was used to find the extracted values of capacitance & resistance. Pattern sensitivity failure was simulated and back tested. The layout was tested on an IC.

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