Aharon Nagad
Lakeway,Texas
Summary
/ Objective: An impactful role combining engineering and technical/program leadership/management in a dynamic VLSI team developing industry leading SoCs. Summary of qualifications: more than three decades of hands-on experience in chip design – digital design. Familiar with all aspects of ming of large high-performance SoCs Proficiency in STA and methodologies for ming closure Good understanding of noise, crosstalk, signal integrity and PVT/OCV issues Proficiency in programming in Perl, TCL, and other languages (C, C++) Familiarity with ECO techniques and implementation Proficiency in Verilog/VHDL, formal verifications, lint checks, multi-clocks, and power domain designs. Good communicator with ability to articulate issues and follow them through to completion Micro-architecture definition for AHB, AXI, SATA, SPI, I2S, I2C and other interfaces Extensive experience in Simulation and debug, developing specification, performance and power analysis and tuning (PTPX), MBIST insertion, SCAN, LBIST, and pattern generation.
Overview
38
38
years of professional experience
Work History
Senior Principal Digital ASIC Design Engineer
Indie Semiconductor
03.2017 - Current
- Created complete design requirements, verification plan and user guides.
- Collaborated with physical design teams to verify constraints, achieve timing closure and optimize place and route.
- Recommended new tools and practices for continuous improvement in group ASIC design flow.
- Performed architecture guideline and model analysis to define micro-architectures.
- Resolved architecture, design, or verification problems by applying sound ASIC engineering practices.
- Worked with IP teams to review verification test plan, coverage analysis and full-chip simulation.
- Designed and developed interface logic and top level netlists for new ASICs.
- Cooperated with systems, hardware and software engineers as well as program management to design products meeting market needs.
Senior Principal Customer Engagement Engineer
Cadence
12.2015 - 03.2017
- Supported Customers in adopting Rocketick simulation accelerator
- Demonstrated respect, friendliness and willingness to help wherever needed
- Organized and detail-oriented with strong work ethic
- Identified issues, analyzed information and provided solutions to problems
Senior Staff Engineer
Qualcomm
10.2012 - 11.2015
- Trained and mentored competent and flexible workforce to meet project needs and promote positive work environment.
- Performed preventative maintenance to keep tools and equipment functional.
- Read and interpreted blueprints, technical drawings, schematics, and computer-generated reports.
- Provided input to team lead regarding areas for process and procedural improvement.
- Self-motivated, with strong sense of personal responsibility
- Proven ability to learn quickly and adapt to new situations
- Worked well in team, setting, providing support and guidance
Senior Principal Design Engineer
Broadcom Israel
02.2012 - 10.2012
- Addressed design challenges and evaluated alternative design models to meet project requirements.
- Drafted documentation detailing design requirements and technical specifications.
- Used excel to meet design specifications for functional prototypes.
- Collaborated with cross-functional teams to conceptualize and refine product concepts.
ASIC Group Manager
Wavion
02.2004 - 02.2008
- ASIC group manager responsible for first and second generaons of WiFi chip
- Worked effectively in fast-paced environments
- Managed time efficiently in order to complete all tasks within deadlines
- Excellent communication skills, both verbal and written
- Used critical thinking to break down problems, evaluate solutions and make decisions
Digital ASIC Design Team Leader
Texas Instruments
02.2001 - 02.2004
- Monitored team performance and provided constructive feedback to increase productivity and maintain quality standards.
- Supervised team members to confirm compliance with set procedures and quality requirements.
- Worked with team to identify areas of improvement and devised solutions based on findings.
- Built strong relationships with customers through positive attitude and attentive response.
- Responsible for second generation Digital Radio Processor (DRPTM) for
Bluetooth within department,
ASIC team leader
Zen Research
05.1995 - 02.2001
- DVD decoder with DVD write capabilities (x10).
- CD Rom decoder chip up to True 72X and DVD decoder up to 25X
- Algorithm developer & system engineer
- Used critical thinking to break down problems, evaluate solutions and make decisions
- Identified issues, analyzed information and provided solutions to problems
ASIC Engineer
ECI
04.1993 - 05.1995
- Created complete design requirements, verification plan and user guides.
- Worked with IP teams to review verification test plan, coverage analysis and full-chip simulation.
- Verified designs utilizing self-checking techniques with directed and constrained random tests while tracking functional and code coverage.
- Resolved architecture, design, or verification problems by applying sound ASIC engineering practices.
Associate Engineer
Israel Defense Forces
05.1985 - 05.1990
- Designed communications related digital hardware using PALs, FPGAs (Xilinx, Altera).
- Reviewed and corrected work of 4 entry-level engineers
- Presented new design and operational guidelines to senior engineers, resulting in 30% improvement in task completion
Education
Bachelor of Science - Electrical and Computer Engineering
Israel Institute of Technology
Haifa, Israel04.1994
Associate Engineering Diploma - electronics and computers
Singalovski College of Engineering
Tel Aviv, Israel1985
Skills
- Basic Tools
- Test Equipment
- Process Modeling
- UNIX Platform
- Interface Design and Implementation
- Switching Protocols
- Network Computer
- Hardware Architectures
- Software and Hardware Evaluations
- Design and Implementation
- Project Management
Additional Information
- Patent: , Method and apparatus for buffering data in a mul-beam opcal disk reader (US Patent #6137763).
Timeline
Senior Principal Digital ASIC Design Engineer
Indie Semiconductor
03.2017 - Current
Senior Principal Customer Engagement Engineer
Cadence
12.2015 - 03.2017
Senior Staff Engineer
Qualcomm
10.2012 - 11.2015
Senior Principal Design Engineer
Broadcom Israel
02.2012 - 10.2012
ASIC Group Manager
Wavion
02.2004 - 02.2008
Digital ASIC Design Team Leader
Texas Instruments
02.2001 - 02.2004
ASIC team leader
Zen Research
05.1995 - 02.2001
ASIC Engineer
ECI
04.1993 - 05.1995
Associate Engineer
Israel Defense Forces
05.1985 - 05.1990
Bachelor of Science - Electrical and Computer Engineering
Israel Institute of Technology
Associate Engineering Diploma - electronics and computers
Singalovski College of Engineering
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