Ashley Buell
Chandler,AZ
Summary
Process Engineer with BSE in Engineering and 5+ years experience in semi-conductor manufacturing.
Overview
6
6
years of professional experience
Work History
SEED Process Engineer
Intel
Chandler, AZ
04.2024 - Current
- Driving transfer of PTL process for backside wafer scrub manufacturing equipment to AZ fabrication site. This includes scheduling transfer of all related automation systems and verification of working order post-transfer. In addition, this requires coordinating multiple engineering, technical, and installation teams to convert existing equipment to be able to manufacture the PTL process and to install/ qualify new equipment to do the same. This encompasses writing/ approving procedural or operational changes and training engineers and technicians to incorporate with a safety and quality mindset.
- Scheduling preventative and corrective maintenance activities on backside wafer scrub manufacturing equipment, taking into account technician availability as well as cost of work. This includes investigating alternate solutions if parts/ labor are unavailable or use of which would put the module over expense targets.
- Responding to backside wafer scrub manufacturing equipment errors and creating gameplans for recovery of the equipment as well as dispositioning batches affected by equipment error(s).
- Pulling defect data at operation steps throughout the line to verify a quality product and investigating potential root cause(s) if any of the backside wafer scrub manufacturing equipment is determined to be contributing to a mismatch.
Process Engineer
Intel
Chandler, AZ
05.2020 - 04.2024
- Project owner for Fault Detection and Classification data collection for frontside wafer chemical etch manufacturing equipment. This required determination and setup of chemical flow limits/ rules for each etch recipe, as well as confirmation that the data collection start/ end windows were reasonable and did not overlook data needed to make crucial safety or quality decisions.
- Project owner for Failure Mode and Effects Analysis for frontside wafer chemical etch manufacturing equipment. This involved a semi-annual analysis of current severity, occurrence, and detection scoring for each equipment failure type, as well as driving projects to reduce the overall score of multiple failure types.
- Owner of cost-savings project to extend etch monitor wafer run frequency without a statistically significant shift in inline parametic or defect targets. This lead to ownership of a follow-up project in which etch equipment was set up to automatically skip a scheduled defect monitor wafer after checking inline data as well as the recent equipment history.
- Scheduling preventative and corrective maintenance activities on frontside wafer chemical etch manufacturing equipment, taking into account technician availability as well as cost of work. This includes investigating alternate solutions if parts/ labor are unavailable or use of which would put the module over expense targets.
- Responding to frontside wafer chemical etch manufacturing equipment errors and creating gameplans for recovery of the equipment as well as dispositioning batches affected by equipment error(s).
- Pulling defect data at operation steps throughout the line to verify a quality product and investigating potential root cause(s) if any of the frontside wafer chemical etch manufacturing equipment is determined to be contributing to a mismatch.
Process Engineering Intern
Intel
Chandler, AZ
11.2018 - 05.2020
- Project owner for alarm reduction on FOUP wash equipment. This involved regular data collection and pareto analysis to identify potential nuisance alarms as well as chronic issues in the fleet.
- Collecting FOUP wash equipment qualification data (primarily for relative humidity).
- Updating internal part order listings to include images of parts for easier ordering.
- Implementation assist for FOUP conversion upgrades.
Education
Bachelor of Engineering - Chemical Engineering
Arizona State University
Tempe, AZ05-2020
Skills
- Process Development
- Six Sigma Methodologies (JMP)
- Root Cause Analysis
- Data Analysis
- Process Improvement
- Manufacturing Processes
- Maintenance Planning
- Installations
Timeline
SEED Process Engineer
Intel
04.2024 - Current
Process Engineer
Intel
05.2020 - 04.2024
Process Engineering Intern
Intel
11.2018 - 05.2020
Bachelor of Engineering - Chemical Engineering
Arizona State University