Summary
Overview
Work History
Education
Skills
Languages
Timeline
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Ashutosh Dahal

Forest Grove

Summary

Process engineering professional with solid expertise in optimizing manufacturing processes and improving operational efficiency. Skilled in process design, data analysis, and quality control, consistently delivering impactful results through team collaboration and adaptability. Known for strong problem-solving abilities, keen attention to detail, and effective communication, ensuring reliable and flexible contributions to any project.

Overview

16
16
years of professional experience

Work History

Process Engineer (Grade 8)

Intel Corporation
04.2024 - Current
  • Qualified CVD metal deposition processes across 5 back-end layers on Intel 4, 3, 18A, 14A; reduced inline defects by 10× and boosted production yield.
  • Led supplier collaboration as FPOC for Intel 18A and 14A metallization improvement process, supporting successful pilot.
  • Reduced fill-related defects by 50× and cut particle-related issues by 20%, resulting in a 4.75 RISO gain on Intel 4 BE layers. (Departmental Award: Q1 2025)
  • Developed contact metal fill for Intel Specialized Technology with ~45% defect reduction. (Departmental Award: Q4 2024)
  • Delivered 10× defect reduction and 5% resistance improvement on Intel 18A metallization process. (Departmental Award: Q4 2024)
  • Implemented a new BE metal fill scheme on Intel 14A, achieving 100× inline defect reduction. (Departmental Award: Q2 2024)

Process Engineer (Grade 7)

Intel Corporation
09.2019 - 04.2024
  • Led Intel 4 metal fill and integrated package development, reducing defects by 50× and delivering $25M in cost savings. (TD Group Award: H2 2023)
  • Qualified Intel 22nm metal fill processes for Intel 14nm tools, avoiding two chamber purchases. (Departmental Award: Q1 2022)
  • Led critical gas supplier transition, completing qualification over two months ahead of schedule.
  • Brought new toolset online 1 week ahead of timeline through automation and training.
  • Drove Automation/Test wafer route/Operations/Metrology setup for First of a Kind Module with setup complete by tool up date. (Departmental Award: Q4 2020)
  • Improved metal fill resistance by 40% and reduced defects 3× through multi-team collaboration. (Departmental Award: Q4 2021)
  • Owned SPC/PCSA for multiple quarters, maintaining
  • Implemented automation upgrades that saved 2+ technician hours weekly across the module.

System Support Assistant

William Jewell College IT Department
01.2009 - 01.2013
  • Provided IT support and troubleshooting for faculty and staff.
  • Maintained hardware/software and managed system upgrades campus-wide.

Undergraduate Researcher

William Jewell College
01.2009 - 01.2013
  • Fabricated and analyzed 100+ polymer samples using bulk and frontal polymerization.
  • Contributed to peer-reviewed EPR-based research publications.

Education

Ph.D. Coursework - Experimental Condensed Matter Physics

University of Missouri
Columbia, MO
01.2018

B.S. - Physics and Mathematics

William Jewell College
Liberty, MO
01.2013

Skills

  • Process Development
  • Semiconductor Manufacturing
  • Thin Film Metallization
  • Defect Reduction
  • Yield enhancement and performance optimization
  • SPC / PCSA and e3 process control
  • Design of Experiments (DOE)
  • JMP
  • MATLAB
  • Python
  • LabVIEW
  • IGOR Pro
  • Excel
  • Automation Systems
  • EBPVD
  • CVD
  • ALD
  • AFM
  • Defects Metrology
  • Data analysis
  • Cross-functional teamwork
  • Continuous improvement

Languages

Hindi
Professional Working
English
Full Professional
Nepali
Native or Bilingual

Timeline

Process Engineer (Grade 8)

Intel Corporation
04.2024 - Current

Process Engineer (Grade 7)

Intel Corporation
09.2019 - 04.2024

System Support Assistant

William Jewell College IT Department
01.2009 - 01.2013

Undergraduate Researcher

William Jewell College
01.2009 - 01.2013

B.S. - Physics and Mathematics

William Jewell College

Ph.D. Coursework - Experimental Condensed Matter Physics

University of Missouri

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