Carlos Manuel Figueroa Cárdenas
INTEL
ZAPOPAN,JALISCO
3
Languages
1
Certification
15
years of professional experience
Results-driven Technical Project Manager with 6 years of project management experience and 15 years of datacenter infrastructure expertise. Demonstrated capability in managing cross-functional development teams for server product development, ensuring on-time, on-budget delivery by aligning technical complexity with business strategy. Proven track record in collaborating globally with key stakeholders and driving meaningful outcomes in high-pressure environments. Recently orchestrated hardware and software teams in the Intel Xeon 6 program, generating $8M in incremental profit impact.
Work History
Technical Product Manager /Senior Platform and Hardware Applications Engineer
2 Years 1 Month- Managed Lenovo/Hyve/Bull/Atos/IBM account, driving customer-focused solutions.
- Led cross-functional Lenovo and Intel technical meetings to resolve design and compatibility issues.
- Partnered with program managers to align project plans and schedules for Intel and Lenovo.
- Created hardware and software project reports, including metrics and KPI tracking for customers.
- Served as technical lead for DDR5, driving solutions for customer memory issues.
- Collaborated with global teams in the U.S., Taiwan, and India to support Lenovo across regions.
- Drove Lenovo design wins and new requirements, facilitating collaborative efforts across teams.
Technical Product Manager and Memory Technical Lead and Application Engineer
3 Years 9 Months- Enabled Cisco’s server design to adopt Intel processors and server architecture.
- Presented quarterly updates to Cisco’s directors, analyzing test results and progress.
- Debugged and resolved memory issues for key customers including Cisco, Lenovo, and Oracle.
- Trained engineers on DDR5 memory topics and developed debug methodologies.
- Coordinated memory validation activities with Intel teams and external partners.
Network/High Speed Application Engineer
3 Years 2 Months- Created hardware architectures focused on MPUs, FPGAs, networking, and high-speed interfaces.
- Provided high-speed hardware solutions for customers, serving as the expert on high-speed interfaces.
- Delivered DDR architecture training to internal and external teams.
Platform Application Engineer
4 Years 4 Months- Served as HPE Storage account owner, resolving technical issues and leading customer meetings.
- Coordinated multidisciplinary teams to support external server customers in the Ice Lake Server PDG.
- Created PCH signal-integrity training materials for external customers.
Hardware and Signal Integrity Engineer
1 Year 8 Months- Created and validated routing rules for server validation platforms.
- Applied simulation tools, including HFSS and HSPICE, for bus technologies.
- Collaborated with teams to define routing rules and coordinate engineering activities.
Education
Master of Business Administration - Business Administration
- Developed and implemented the mission and vision for Picstar.
- Calculated Picstar’s operating margin and projected it for the next five years.
- Determined pricing for Picstar’s photo booth service.
- Analyzed and forecasted demand for Picstar’s photo booth service over five years.
- Created and implemented the board manufacturing process for the Hetpro company.
Master of Science - Electronic and computation engineer (microwave area)
- Developed a time-domain analysis of a microstrip transmission line terminated with a nonlinear load.
- Developed and implemented a computational algorithm to simulate the propagation constant of coaxial cables.
- Developed and implemented computational algorithms to calculate antenna array factors.
- Developed and implemented computational algorithms to determine current distribution in antenna arrays.
- Developed and implemented computational algorithms to calculate antenna directivity patterns and values.
- Experience by using EDA tools for integrated circuit design as Cadence Allegro and Virtuoso as well as circuit simulator as HSpice, HFSS and CATIA V5.
- Collaborate with Phd program director to develop floorplans and design layouts while applying solutions for layout effects such as Antenna (ANT).
Bachelor - Electronics and communication Engineering
- Designed and built an LDR-based distance measurement instrument as project leader.
- Designed and built a water-level measurement device as project leader.
- Designed and built an LVDT-based displacement measurement instrument as part of a group project.
- Designed and built a weight measurement instrument as part of a group project.
Skills
Product lifecycle management
Stakeholder management
Agile Methodologies
Problem-solving
Technical documentation
Jira and Power BI
Circuit Design Tools (Allegro
Virtuoso
HFSS
HSPICE
JMP)
Cross-functional leadership
KPI tracking
Process improvement
Customer experience management
Team leadership
Embedded Systems
Certification
- Preparation for certification as a Project Management Professional (PMP) - (4 months) – University: ITESO
- Controlling reflection noise and cross talk by Bogatin Enterprises and LeCroy company – Place: Intel Guadalajara side
- Two Ansys training (2 days each session) – Place: Holliday Inn Hotel
- Agilent’s oscilloscope certification (1 day) – Place: UDG Campus CUCEI
- HP’s signal generator certification (1 day) – Place: UDG Campus CUCEI
- Agilent’s RF network analyzer certification (1 day) – Place: UDG Campus CUCEI
- HP’s spectrum analyzer certification (3 day) – Place: UDG Campus CUCEI
- Diploma in information technology: networking, CCNA and administration (1 semester) – Place: ITESO
- Certificate for passing the 12 levels of PDU. PROULEX English (2 semester)
- Certify Grade 6 Graded Examinations in Spoken English B1 of the CEF and Entry Level of the NQF in England
- Diploma of Harmon Hall Institute for passing the 16 levels of English (2 semester)
- Certificate of excellence for June and July 2010 at Quick Learning School of English (2 semesters).
Languages
Spanish – Spoken, written: Native
English – 90 %
German – 10%
Publications
C.M.F. Cárdenas and A.D. Jiménez, “Influence of measured scattering parameters on the convolution simulation of nonlinear loaded high-speed microstrip interconnects” Progress In Electromagnetics Research M, Vol. 19, 77-90, 2011.
Timeline
Technical Product Manager /Senior Platform and Hardware Applications Engineer
INTEL
07.2024 - CurrentRead More
Technical Product Manager and Memory Technical Lead and Application Engineer
INTEL
10.2020 - 07.2024Read More
Network/High Speed Application Engineer
AVNET
08.2017 - 10.2020Read More
Platform Application Engineer
INTEL
04.2013 - 08.2017Read More
Hardware and Signal Integrity Engineer
INTEL
08.2011 - 04.2013Read More
UNIVERSITY OF GUADALAJARA CAMPUS CUCEA
Master of Business Administration from Business Administration
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UNIVERSITY OF GUADALAJARA CAMPUS CUCEI
Master of Science from Electronic and computation engineer (microwave area)
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UNIVERSITY OF GUADALAJARA CAMPUS CUCEI
Bachelor from Electronics and communication Engineering
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