Summary
Overview
Work History
Education
Skills
Timeline
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Changook Jeon

Irvine,CA

Summary

Semiconductor engineering expert with over 14 years of experience at Samsung Electronics, specializing in yield improvement and defect analysis for DRAM and HBM technologies. Defect expert who directly analyzes and improves semiconductor process and equipment defects. Has a proven track record of industry-first innovations through TF activities such as EUV DRAM and 10nm 2nd generation DRAM development. Has extensive experience applying engineering principles to real-world problems in manufacturing, not just semiconductors, to drive impactful solutions and improve operational efficiency. Seasoned engineering professional known for innovating and solving complex technical challenges, delivering high-quality solutions, and driving team success through effective collaboration and adaptability. Skills include systems analysis, project management, and technical troubleshooting.
Reliable and adaptable, with the ability to learn and apply new skills quickly. Dedicated to leveraging these qualities to drive team success and contribute to the growth of the organization.

Overview

15
15
years of professional experience

Work History

Staff Semiconductor Engineer

SAMSUNG Electronics
03.2018 - Current
  • Enhanced HBM3 yield through defect identification and process optimization.
  • Improved HBM2 yield by 48% with 25 process enhancements (TSV, bonding) in mass production.
  • Built DRAM defect inspection systems, improving D1b/D1c yields, saving $1.74M yearly via efficiency.
  • Optimized defect inspection, boosting detection 32%, cutting time 10%, raising yield 0.52%.
  • Spearheaded a task force to successfully achieve the world’s first mass production of 10nm 2nd-generation (D1y) DRAM, overseeing process development and ensuring production scalability.
  • Pioneered the application of EUV technology in DRAM manufacturing, reducing over 30 process steps, marking an industry-first milestone and enhancing production efficiency significantly.

Semiconductor Engineer

SAMSUNG Electronics
07.2010 - 02.2018
  • Improved semiconductor yield by conducting quality audits for component and material suppliers.
  • Specialized in cleanroom contamination control, achieving significant results by implementing measures.
  • Analyzed defects using advanced tools (SEM, TEM, EDX, SIMS, FIB, XRD etc.), reporting mechanisms and solutions to enhance material-related defect resolution.
  • Established chemical-defect correlations, systematizing CoA standards and specifications for semiconductor process chemicals to optimize quality control.
  • Contributed to the world’s first 35nm DRAM yield of 93% through dedicated TF activities.
  • Participated in over 10 yield enhanced TF, including 10nm yield improvement at Samsung Foundry (Austin, TX) and V-NAND yield optimization at Samsung China Semiconductor. (Xi’an, China)

Education

Master of Science - Advanced Materials Engineering

Yeungnam University
02.2011

Bachelor of Science - Ceramics and Semiconductor Materials Engineering

Yeungnam University
02.2009

Skills

  • Yield optimization
  • Defect analysis
  • Materials development experience

  • System process integration
  • Project management

Timeline

Staff Semiconductor Engineer

SAMSUNG Electronics
03.2018 - Current

Semiconductor Engineer

SAMSUNG Electronics
07.2010 - 02.2018

Bachelor of Science - Ceramics and Semiconductor Materials Engineering

Yeungnam University

Master of Science - Advanced Materials Engineering

Yeungnam University