Divya Tiwari
Milpitas,CA
Summary
13 years of experience. Excellent with communication, team coordination and leadership. Comprehensive knowledge of Front-End Design and Verification challenges. In-depth knowledge of product development cycle, project planning and management.
Overview
17
17
years of professional experience
Work History
Design Verification Methodology Engineer
Intel Corporation
01.2016 - Current
- Provide technical support and debugging for various tools, optimize internal scripts, work with UVM-SV simulation environment, analyze and debug design issues, drive tool evaluations, develop, and deliver technical training.
- Developed and implemented engineering strategies to improve production efficiency.
- Global collaboration with EDA tool vendors helped me gain profound knowledge of front-end tools.
- Identified customer needs and developed solutions based on user feedback. Evaluated existing processes and technology solutions for improvement opportunities.
- Performed calculations and simulations to analyze performance data.
CAE (Contractor)
Synopsys
02.2014 - 12.2015
- Troubleshooting and debugging VC-VCS-Verdi issues, developing new features for VCS & Verdi.
Engineer III (Contractor)
Qualcomm
03.2012 - 05.2013
- Developing UVM-based verification environment, subsystem verification for a Peripheral IOs and taking it to 100% functional and code coverage closure.
Senior Semiconductor Verification Engineer
TATA ELXSI
07.2010 - 10.2011
- Verification of LIN protocol and H.264 based Video CODEC IP, defining verification architecture and coverage.
ASIC Engineer
eInfochips
05.2007 - 06.2010
- Verification of WLAN PHY chip and Memory Tester module.
Education
Master of Engineering - Communications
Gujarat University
07.2007
Bachelor of Engineering - Electronics and Communications
Bhavnagar University
07.2005
Skills
- Git
- Perl
- Python
- System Verilog
- UVM
- Intel Internal Tools
References
Available upon request
Timeline
Design Verification Methodology Engineer
Intel Corporation
01.2016 - Current
CAE (Contractor)
Synopsys
02.2014 - 12.2015
Engineer III (Contractor)
Qualcomm
03.2012 - 05.2013
Senior Semiconductor Verification Engineer
TATA ELXSI
07.2010 - 10.2011
ASIC Engineer
eInfochips
05.2007 - 06.2010
Master of Engineering - Communications
Gujarat University
Bachelor of Engineering - Electronics and Communications
Bhavnagar University
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