Senior Verification Engineer with a proven track record at Amazon, showcasing expertise in Full-Chip SOC verification using C & UVM, and Power-aware Verification with UPF. Excelled in enhancing verification processes and methodologies, demonstrating exceptional problem-solving skills and a mastery in SystemVerilog and script automation (Python/Perl). Passionate about driving project success through innovative verification strategies and collaborative teamwork.
UVM / OVM, SystemVerilog / e Language, Power-aware Verification with UPF/CPF, VIP (AMBA, HDMI, MIPI series, USB etc), Coverage & Metric Driven Verification, Design Compiler & PT-PX, Formality / Conformal, Assertion-based Verification, Python, Perl, English (Bilingual)