Ebrahim Karimi
Marietta,GA
Summary
Highly skilled and detail-driven professional with extensive expertise in designing and developing high-voltage test systems tailored for controlled accelerated aging experiments and insulation material analysis. Experienced in operating and leveraging advanced tools for semiconductor device fabrication and characterization. Proficient in analog IC design and PCB layout development.
Overview
6
6
years of professional experience
Work History
Graduate Research Assistant
Georgia Tech
Atlanta, GA
06.2021 - Current
- Analyzed creepage and clearance distances to meet international standards and regulatory requirements for MVDC shipboard power system applications.
- Conducted experiments and simulations to assess the impact of environmental factors on insulation performance under fault conditions.
- Contributed to the revision of IEEE Standard 45.1, focusing on the creepage and clearance section.
- Enhanced switching speed of a piezoelectric actuator-based FMS for Hybrid DC circuit breakers (HCB).
- Designed and developed innovative Partial Discharge (PD) circuit test systems to study long-term insulation aging and reliability of SF6-free Gas-Insulated Switchgear (GIS) insulation, using novel methodologies.
Analog Layout Design Engineer
SiTune Corp. (ARCTIC Semiconductor)
San Jose, CA
01.2021 - 06.2021
- Developed and optimized physical layouts for analog, mixed-signal, and RF integrated circuits (ICs) using EDA tools.
- Verified layouts for adherence to foundry-specific design rules (DRC) and layout-versus-schematic (LVS) compliance.
Graduate Research Assistant
Virginia Tech
Blacksburg, VA
08.2018 - 12.2020
- Designed, fabricated, and characterized optoelectronic photovoltaic devices utilizing low-temperature ion implantation processes.
Education
Master of Science - Electrical Engineering
Virginia Tech
Blacksburg, VA12-2020
Ph.D. - Electrical Engineering
Georgia Institute of Technology
Atlanta, GASkills
- Experienced in operating cleanroom equipment, including photolithography, etching, deposition, dicing, and packaging tools
- Proficient in utilizing characterization tools such as AFM, XRD, and solar simulator
- Analog IC Layout Design
- PCB layout design
- Familiarity with materials science and accelerated aging techniques
- Proficiency in LabVIEW programming and experience with NI hardware
- Experience with hardware interfacing
- Develop custom LabVIEW programs to control the testing system, log data, and monitor real-time performance
- Knowledge of safety standards for high-voltage testing environments
- MATLAB/Simulink, PLECS, LTspice, Cadence Virtuoso, Cadence Allegro, KiCad, ADS
- Excellent problem-solving skills, and attention to detail
- Strong communication and teamwork abilities
Languages
English
Full Professional
Timeline
Graduate Research Assistant
Georgia Tech
06.2021 - Current
Analog Layout Design Engineer
SiTune Corp. (ARCTIC Semiconductor)
01.2021 - 06.2021
Graduate Research Assistant
Virginia Tech
08.2018 - 12.2020
Master of Science - Electrical Engineering
Virginia Tech
Ph.D. - Electrical Engineering
Georgia Institute of Technology
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