Francisco Hernandez

Computer Engineering student with a specialty in FPGA or microcontroller design. Proficient in incorporating digital design theory into VHDL and Verilog. Strong skills in C programming with a focus in embedded systems.

• ECE 595R – Robot and Embedded Systems
• ECE 420 – Digital Systems with VHDL
• ECE 526 – Digital Design using Verilog and System Verilog
• ECE 537 – Deep Learning for Pattern Recognition
• ECE 524 – FPGA/ASIC Design and Optimization

• Senior Design Project – Inter-Satellite Optical Communication System: Assisted in the development of an inter-satellite optical communication system designed to achieve a high-speed data transfer rate of 1Gb/s with a 10^-9 bit error rate. This project involved the integration of error correction codes and bit error rate testing to ensure reliable and efficient communication space-based data transmission.
  
• Line Maze Solver – TI-RSLK Robot: Spearheaded the design and implementation of a line maze solver using a TI-RSLK robot. Applied Proportional-Integral-Derivative (PID) control and Finite State Machine (FSM) logic to enable precise line-following capabilities. This project showcased programming expertise in C and demonstrated a comprehensive understanding of serial communication, robotics, and algorithmic design to contribute to the robot's navigation using reflective sensors.