Gajanan Dhondiba Maske

PROFILE SUMMARY Senior Technical Lead with more than 14 years of experience in design and develop of Video Codecs, Computer Vision, Radar Algorithms and System applications on various Embedded Platforms. Core Qualifications Hands on experience on various embedded platforms and multimedia frameworks Experience in various Video, Image & Audio Codec standards Experience in developing and packaging embedded product applications Deep knowledge of Software Development Life Cycle starting from project estimation till customer support phase

• Design and Integration of developed IRIS solution on RZ/A2M (Renesas MISANO Platform)
• Design and develop IRIS detection for the extraction solution for IRIS signature-based access control using camera sensor
• Leading the team to develop auto-exposure feature and tune it for selected camera, develop IRIS Localization, cropping, masking and integration of pipeline algorithms
• Compress the captured IRIS image in JPEG2000 compression format and optimize it on ARM core
• Porting of TSR (Traffic Sign Recognition) algorithm on AM5749 (Sitara) from TDA2x
• Analyzed the TSR algorithm developed internally using TIDL (Texas Instrument’s Deep Learning) APIs on TDA2x
• Ported the same algorithm from TDA2x to AM5749 which uses the TIDL APIs on Processor SDK Linux
• Design and development of Short-Range Radar algorithms on TDA3x
• Development of short-range radar algorithms like 4D-FFT, 3D SUPPORT MUSIC (DOA), MIMO separation, Rx and Tx correction
• Design the complete algorithm pipeline
• For Range, Doppler FFT, MIMO separation used EVE core and Elevation & Azimuth FFT along with 3D SUPPORT MUSIC on DSP core
• Pipeline build using Links and Chains method from Radar Processor SDK
• Leading the entire development team by analyzing the technical requirements, reviewing code development, quality delivery of each milestone and ensure timely completion
• Interaction with customers to update the project status and incorporated changes provided by customer feedback
• Porting mmWave Link APIs on Free RTOS required for Long Range Radar (LRR)
• Enabled Free RTOS on Arm Cortex A53
• Analyzed the mmwave link API provided by TI on TI-RTOS and integrated the code on Free RTOS
• Developed multiple tasks to handle the application and the control code
• Porting and Optimization of Audio AAC-LC Encoder on Myriad X
• Redesigned the AAC-LC Encoder pipeline for LEON & SHAVE core on Myriad X
• Ported application code and bit-stream writing modules on LEON core
• Ported modules like Transform, Psycho Acoustic Modeling, Quantization on SHAVE core
• Optimized the modules running on SHAVE core using VLIW for code size efficiency and SIMD for high parallelism and throughput at a functional level
• Porting of color conversion code from ARM core to DSP core and Validate using Gstreamer plugins
• Port the color conversion code from ARM core to DSP core and optimize the same
• This is to reduce the load from ARM core to run the audio pipeline and improve the overall performance of the pipeline
• Validate the pipeline using Gstreamer plugins commands
• Radar algorithm pipeline development on IWR1642
• Design, development and optimization of Direction of Arrival (DOA) algorithms like ESPRIT, ROOT MUSIC on C67x core of IWR1642 EVM
• Design, development and optimization of Clustering algorithm (DBSCAN – Density based spatial clustering) on C67x core of IWR1642 EVM
• Designed the entire pipeline of algorithms using Texas Instruments mmWave SDK on IWR1642 EVM
• Development of Radar Recording System using IWR1443EVMs & Jetson TX2s
• Configured the IWR1443EVM for the customer required radar parameters
• Control the radar configuration from PC for multiple radar systems simultaneously
• Guided BSP team to develop the CSI2 capture driver on Jetson TX2 using Auvidea J120 carrier board
• Design the complete pipeline from transmitting ADC Raw radar data from IWR1443EVM, capture the ADC data from CSI2 interface on Jetson TX2 and store it on SSD memory
• Enable IMU sensor on Jetson TX2 along with USB GNSS
• Capture and store the motion data, temperature, GPS on SSD memory simultaneously for every radar pipeline
• Design and development of Object Avoidance and Path Planning using 3D- TOF camera (OPT8241) on TurtleBot3
• Ported Texas Instrument’s Voxel SDK on Raspberry PI 3 processor of TurtleBot3
• Designed and development the object avoidance use-case using Texas Instrument’s OPT8241 EVM
• Designed and developed the path planning algorithm using object avoidance on OPT8241 and TurtleBot3 robot for movement
• The Path planning algorithm run on ARM core of Raspberry pi 3
• Design and development of SLAM algorithms on Movidius Myriad 2
• Redesigned the SLAM algorithm on Myriad2 for LEON and SHAVE cores on Myriad 2
• Redeveloped the SLAM feature extraction modules like Fast-Corner, Fast-Score, IC-Angle, Gaussian Filter & Brief Descriptor
• Integrate all the modules on Movidius Myriad 2 platform using SIPP Framework which will utilize the Multiple SHAVE cores effectively by dividing the respective task into equal sizes
• As a Technical Lead, I was responsible for
• Design and development of Frame Rate Up conversion on x86
• Development of frame rate up conversion algorithm which will double the frame rate by predicting every alternate frame based on previous and future frames
• X86 Optimization of developed algorithm on i3 processor to get 60fps real time
• Porting and Optimization of Voxel SDK Framework on x86 & ARM platform using OPT8241 EVM
• Optimization of Voxel SDK Framework on x86 (i5 core) to run @60fps with only 10% CPU load
• Porting of Voxel SDK framework on ARM core (Raspberry Pi 3) and resolve all libraries dependency issues
• Optimize the Voxel SDK framework on ARM to run @30fps with only 30% CPU load
• Profiling and testing
• Video Codecs Customer support for all variants of Texas Instrument’s devices (HDVICP and Multicore C66x DSP)
• Mentor the team to handle all the customer support activities
• Interaction with Customer to understand the issue & provide the solution appropriately
• Worked on Customer support for most of the HDVICP based Video Codecs like H264 Encoder/Decoder, VC1 Decoder, MJPEG Encoder/Decoder, MPEG4 Encoder/Decoder, MPEG2 Decoder
• Worked on Customer support for most of the Multi-core DSP (Shannon) based Video Codecs like HEVC Encoder/Decoder, H264 Encoder, MPEG2 Encoder and AVC Encoder
• Worked on Customer support for multiple frameworks like EZSDK, DVR-RDK, IPNC RDK, Processor SDK
• Worked on various Texas instrument’s embedded platforms like OMAP4, DM816x (NETRA), DM812x, DM814x, DM38x, DSPC 8681 (Multiple C66x devices)
• DDR Optimization of VC1 Decoder on DM816x (NETRA)
• Modifying the VC1 Decoder design to reduce the DDR Usage
• Implementation of Bounding box to reduce the DDR Usage
• Bug fixing for customer reported issues
• Design and development of SVAC Encoder on DM812x using HDVICP and DSP core
• Design and development of complete pipelining between HDVICP and DSP core for SVAC Encoder
• Configuration of HWA’s of HDVICP to H264 and AVS format
• Development of communication between the HDVICP and DSP core
• C66x Optimizations of SVAC Encoder modules
• Design and development of HEVC Encoder on Multicore C66x (Multichip Shannon platform)
• Porting of HEVC reference Encoder on Multicore C66x platform
• Redesigned the code and data flow of HEVC encoder to best utilize the multicore C66x platform (from Performance and Quality prospective)
• Design and developed the scheduling algorithm to reduce the idle time for C66x cores and improve the overall performance
• Development of ping pong buffer management to process the HEVC Encoder in Wave-front fashion
• Development of fast algorithms in Mode decision module of HEVC Encoder to improve the overall performance
• C66x DSP optimization, Profiling and Testing of HEVC Encoder modules
• As a Sr
• Software Engineer, I was involved in
• Design and development of H264 Encoder on DM816x (NETRA) for Broadcast applications
• Design and development of Bi-Prediction feature for B pictures in Trueview H264 Encoder
• Implementation of conditional Image code loading for Trueview H264 Encoder
• Design and development of H264 encoder to support high resolution till 4352x4096
• Added support of features like ROI, Privacy Masking & Multi-Slice for high resolution of 4352x4096
• Design and development of Scalable Video Coding (SVC) Encoder on OMAP4 EVM
• Design and development of temporal scalability features (Hierarchical P Coding & Hierarchical B Coding) in SVC Encoder
• Implementation of Decoded Picture Buffer (DPB) & Capture Buffer management for Temporal Scalability in SVC Encoder
• Implementation of Reference Picture Marking & Re-ordering for Long-term referencing & Short-term referencing
• Design and development of Stereo Video Coding feature in MVC Encoder on OMAP4 EVM
• Design and developed the stereo video encoding features like SEI messages in MVC (Multi-View Codec) Encoder
• Profiling and unit level testing, As an Software engineer, I was involved in following projects
• Design and development of Scalable Video Coding (SVC) Encoder
• Implementation of Up-sampler & Down-sampler for SVC
• Implementation of Inter-Layer Prediction using Lower Layer information for SVC Encoder
• Design and development of H264 Video Codec Encoder
• Implementation of Search Algorithms for Motion Estimation
• Modification of Memory model for Motion Estimation
• Implementation of Adaptive Transform coding
• Identify and fix the Quality related issues
• Video Quality Evaluation of H264 Encoder compared to other Video Codec Encoders
• Design & Implementation of Video Quality metrics PSNR & SSIM Calculation Tool
• Created Test Bench for Evaluation
• Quality Evaluation of TEL_H264_CODEC for High Profile
• Generate PSNR and SSIM results & Plot the RD and RC curves for multiple H264 codecs like TEL_H264_CODEC, JM14.2 & Main-Concept H264
• Explore the feasibility of Line Based Encoder & Decoder implementation on FPGA for 720P@30fps (1280x720) at maximum 159Mbps.The aim is achieving the Line Based solution with better quality (PSNR more then 40dB) & suited for Altera Stratix-II EP2S90
• Studying of JPEG2000 standard and Evaluation (Quality, Performance and Feasibility) of JPEG2000 (Encoder & Decoder) based reference code by Jasper version 1.900.1
• Find the memory requirement for JPEG2000
• Testing of Jasper Code for various configurations as like different cases of tile sizes, different code blocks, filters & decomposition levels as suggested by client (CRF)
• PSNR calculation of original & reconstructed images
• Papers
• Lossless Medical Video Compression using HEVC
• This paper outlines an approach to improve the compression ratio of medical video sequence using HEVC (High Efficiency Video Coding) while satisfying the need of lossless encoding, as usage of lossy compression tools leads to loss of information of the original medical video sequence and may lead to diagnostic errors
• Refer below link for more details – https://www.design-reuse.com/articles/39968/lossless-medical-video-compression-using-hevc.html https://www.slideshare.net/PathPartnerTech/lossless-compression-of-medical-videos-using-hevc-64117441 https://www.pathpartnertech.com/whitepapers/lossless-medical-video-compression-using-hevc 4 | Page