Summary
Overview
Work History
Education
Skills
Timeline
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GRISHMA SHAH

Milpitas,United States

Summary

Innovative engineering leader with broad and deep expertize in multiple technical domains ranging from digital logic design, Flash Memory, product engineering to SSD system architecture. Passionate about building designs ground up and solving complex cross-functional problems to unlock the full potential of technology and products. Owner of 60+ US patents on impactful innovations in Flash Memory and SSD Systems Design.

Overview

17
17
years of professional experience

Work History

Distinguished Engineer, Systems Design Engineering

Western Digital
11.2019 - Current
  • Lead the team to path-find and innovate next Gen Client SSD, Enterprise SSD and Mobile Products.
  • Responsible for evaluating various memory technology choices and selecting a single technology that meets the requirements of WD's entire Flash product portfolio.
  • Responsible for identifying risks on the product due to defects/DPPM/data corruption that come with various technology choices and defining/driving end-to-end solutions to mitigate them.
  • Advising executive leadership on highly complex, multi-faceted aspects of the technology choices, with business and cross-organizational impact.
  • Responsible for defining Flash memory chip requirements (New design features, performance, cost, reliability, DPPM targets) to meet the product performance for SSD and mobile products. Drive technical solutions across functional boundaries.
  • Responsible for defining a detailed technical interlock between Memory-FW-ASIC components of the product before handing over to the product execution teams.
  • Represent Flash Products Group in quarterly technical reviews with Flash BU customers.
  • Serve as an active member of Invention Review Board to propel innovation in WD.

Senior Technologist, SSD Systems Design

Western Digital
10.2015 - 11.2019
  • Memory Systems lead for several generations of WD Black SSD product.
  • Architected robust data error handling and data recovery system ground-up, for Sandisk's first in-house PCIE SSD Platform, which generated over $15B in revenues through multiple generations of SSD products.
  • Served as functional lead/technical director on several generations of Client SSD products. Planned, managed and executed all the memory system milestones including memory product requirements, feature spec definition, product level learning cycles and FA/RCA from concept to OEM qualification. Collaborated and partnered with NAND/FW/ASIC/TEST/HW teams to enable first generation 3D NAND into WD's "Moonshot" SSD platform.
  • Represented Client SSD engineering in all the Flash core and R&D forums company wide to provide frequent read-outs on Client SSD technical challenges, technical and schedule requirements for memory road-maps.

Senior Staff Design Engineer

SanDisk
07.2006 - 09.2015
  • Logic Design Engineer on 56nm, 32nm, 19nm, 1Znm, BiCS EX2 and EX3 NAND Flash memories
  • Designed and led multiple generations of 2D and 3D NAND logic design. Balanced innovation and execution that led to timely tape-outs and fast productization of Flash products. Mentored several team members who went on to become successful leads.
  • Independently researched and invented several defect detection and data protection features that became the backbone of Sandisk's Flash products.
  • Recognized for innovation that increased SSD's random read performance by 2x and later adopted by all the Flash companies world-wide.
  • Hands-on experience in NAND logic design (using Verilog RTL), static timing analysis, full-chip timing closure, chip floor planning, full-chip verification, automated verification, ECO, Silicon debug and developing Verilog based behavioral models of charge pumps/analog modules/NAND cell array. Owned and designed NAND row control circuits using Schematic editor tools.
    * Collaborated with device/system/verification/test/product engineering teams as well as the business partner for design concept development and tape-outs. Later served as the primary design contact for NAND enablement, productization and FA for all the storage product groups.

Education

Master of Science - Physics, EE

University of Illinois At Chicago
Chicago, IL
12.2005

Bachelor of Science - Electronics Engineering

M. S. University - India
05.2003

Bachelor of Science - Physics

M. S. University - India
05.2000

Skills

  • Digital Logic Design
  • Defect detection and data recovery algorithms
  • Performance, power and reliability trade-offs for NAND Flash Memory
  • Flash management algorithms and SSD System architecture
  • Product planning
  • Technical problem solving and critical thinking
  • Cross-functional leadership
  • Mentoring

Timeline

Distinguished Engineer, Systems Design Engineering

Western Digital
11.2019 - Current

Senior Technologist, SSD Systems Design

Western Digital
10.2015 - 11.2019

Senior Staff Design Engineer

SanDisk
07.2006 - 09.2015

Master of Science - Physics, EE

University of Illinois At Chicago

Bachelor of Science - Electronics Engineering

M. S. University - India

Bachelor of Science - Physics

M. S. University - India

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GRISHMA SHAH