Hsun-Ti Chiang

Project Title: Phase-Locked Loop Design

Advisor: Professor Zhenjie Hong

In this project, I conducted an in-depth study of the design and analysis of a Phase-Locked Loop (PLL). I used HSPICE and Waveform to simulate and analyze the characteristics of MOSFETs, focusing on both analog and digital components. In the second part, I learned layout techniques using Laker. I started by designing layouts for basic logic gates (NOT, NAND, NOR) composed of PMOS and NMOS transistors, and then proceeded to use these gates to complete more advanced layouts (e.g., D flip-flops, TSPC). This project not only enhanced my proficiency with simulation and layout tools but also deepened my practical understanding of semiconductor circuit design.

• Supported engaging, fun, and smooth-running events by helping with organization and planning. I participated as a teaching assistant in a medical camp for elementary school students organized by the Red Cross Youth Group. My role involved teaching first aid and bandaging skills to students . Additionally, I collaborated with other volunteers to organize engaging checkpoint activities for the children. In this experience, I learned how to effectively communicate with others and collaborate in planning large-scale events.