Accomplished Process Engineer with more than 3 years of experience and improving steps in accomplishing goals. Successful and driven individual committed to proactive planning and goal-oriented work.
Overview
7
7
years of professional experience
Work History
Process Integration Engineer
Samsung Austin Semiconductor
07.2022 - Current
Owned, developed, and implemented new processes (MPWs) every quarter to ensure high-quality wafer processing from fab-in to fab-out, totaling 4 to 10 projects per year.
Interfaced with unit parts daily to address and prevent excursions by sharing in-line data analyzed using YMS and JMP, averaging 3 issues weekly per project.
Interfaced with unit parts to verify application of technical details in business practices to improve quality and turn-around-time
Quality Engineer II
Samsung Electronics America
03.2021 - 07.2022
Contributed to root cause analysis to determine core reason for failures and errors observed world-wide regarding apps and basic device functions, such as network instabilities on specific SW versions, through trend analysis, inter-department cooperative testing.
Led quality inspections and drafted reports to detail non-conforming material issues for all hardwares shipping to journalists and tech influencers for reviews; prevented camera SW issue prior to launch event for Galaxy S22.
Chemist
CED Analytical Labs
01.2019 - 01.2022
Prepared waste drums for pick-up and delivery to comply with local, state and federal regulations for treatment and disposal of hazardous waste.
Performed USA and EU Pharmaceutical standardized tests on organic and inorganic compounds to observe fundamental differences in properties.
Established quality control measures for microbiology lab's instrumentation and monitored data quality to operate instrument with control limits.
Education
MS - Materials Science and Engineering
University of Texas at Dallas
Richardson, TX
BS - Chemistry
University of Texas at Dallas
Richardson, TX
Skills
Yield Management System (YMS)
Materials Characterization
Electron Microscopy
EOM Properties of Material
Problem-solving
MS Office
Communication
Relationship building
Self-Motivated
Design of experiments
Failure analysis
Statistical process control
Defect reduction
Process integration
Performance improvement tracking
Process flow analysis
Waste reduction
Team collaboration
Continuous improvement
Root-cause analysis
Project management
Accomplishments
Resolved W-Gate CMP OOS_Low excursion for MRAM device.
Led the eSiGe TIP-X OOC_Low excursion for MRAM device, identifying upstream Poly Gate etch tool-specific issues and implementing TIP to prevent additional losses.
Led eSiGe tuning for all product families in MPW through L1.5 and L2.0 eSiGe growth time, eliminating short defect risks.
Counseled team members on 14nm process, equipment mechanism, and materials science expertise to help troubleshoot excursions.
Optimized and standardized optical profilometry data collection plan for minimal TAT while ensuring sufficient weak point identification per MPW.
Languages
English
Native or Bilingual
Korean
Native or Bilingual
Timeline
Process Integration Engineer
Samsung Austin Semiconductor
07.2022 - Current
Quality Engineer II
Samsung Electronics America
03.2021 - 07.2022
Chemist
CED Analytical Labs
01.2019 - 01.2022
BS - Chemistry
University of Texas at Dallas
MS - Materials Science and Engineering
University of Texas at Dallas
Awards
Master’s Research Fellowship, UT Dallas – Office of Graduate Education