Jay Tissera
San Jose,USA
Summary
Dynamic Senior Manager/Director with over 20 years of expertise in semiconductor Test & Product development and back-end manufacturing of digital, analog, and mixed-signal devices. Proven ability to lead successful transitions of new products to mass production while fostering strategic partnerships with subcontractors. Adept at managing global test operations and enhancing operational efficiency through innovative solutions. Committed to driving growth and excellence in technology-driven environments.
Overview
25
25
years of professional experience
Work History
Sr. Manager/Director, Test & Product Engineering
Allegro Microsystems/Crocus Technology, Inc
06.2021 - Current
- Oversaw high-volume production testing of analog/mix-signal magnetic current and position sensor products from wafer sort to final test.
- Developed wafer sort and final test software for hardware testing on analog and mixed-signal devices.
- Collaborated with offshore manufacturing sites to implement new test programs and hardware for mass production.
- Managed test subcontractors across Taiwan, Malaysia, and the Bay Area for efficient capacity planning.
- Collaborated with foundry partner Tower to enhance yield.
- Oversaw upkeep of testing tools while ensuring smooth day-to-day operational workflows.
- Collaborated with product development engineers to transition new products into production.
- Integrated Galaxy Semiconductor Yield database tools to streamline data analysis processes.
Director, Test Engineering
InSyte Systems, Inc
06.2020 - 06.2021
- Directed engineering and production testing of advanced environmental gas sensing systems.
- Designed and implemented environmental sensor test systems for characterization and qualification of CO and HCHO gas sensors.
- Designed humidifiers, gas mixers/delivery systems, enclosures and test jigs for optimal system functionality.
- Led development of automation software for test systems.
- Guided global team of test and product engineers managing daily operations.
- Led high-volume manufacturing test development and implementation to ensure efficient processes.
Sr. Manager, Test Engineering
Movella/mCube, Inc
07.2011 - 06.2020
- In charge of production/engineering test program and hardware development of MEMS 3-axis gyroscopes, 3-axis accelerometers and 6-axis combo devices from wafer to package level on SPEA and KYEC automatic test equipment’s (ATE)
- Introduced SPEA automatic test equipment and mechanical handling systems to mCube to improve test quality, increase capacity and to reduce test cost
- Pioneered in creating first ever wafer level complete testing (dynamically) solution for accelerometer and gyroscope products to open new business opportunities (known good die)
- Develop, manage production and characterization test program development activities for 3-axis accelerometers, 3/6-axis gyroscopes on SPEA and KYEC E320/I1000 test systems
- Design, develop multi-site test hardware to meet test requirements, increase capacity and to reduce overall test cost
- Work with offshore manufacturing sites (KYEC, ASE) to transfer CP/FT test programs, hardware for mass production; Sustain CP/FT test programs, resolve testing related issues
- Analyze yield data using Galaxy/JMP; Resolve test program sensitivity issues across process to create more robust test program and improved overall yield
Staff Product Engineer
Pixim Inc.
01.2010 - 06.2011
- Lead Product/Sustaining test engineer for all CMOS image sensor and Digital Imaging System products
- Worked closely with TSMC, VisEra, KingPak, KYEC and eSilicon on regular basis to resolve manufacturing issues, disposition material in a timely manner
- Performed wafer sort, assembly, final test and WAT/ET data analysis using JMP on regular basis to improve yield, enhance quality and reduce cost
- Manage failure analysis of customer returns, reliability failures and yield limiters
Manager, Test Engineering
Eastman Kodak Company, CMOS Image Sensor Solutions Group
08.2004 - 11.2009
- Supervised and directed Test engineers, responsible for developing production, characterization test solutions for all CMOS Image Sensor products, defined test methodologies, identified test equipment’s and hardware requirements for near and long-term testing needs of Image Sensor Solutions group
- Lead a team of Test Engineers that developed test programs and hardware for new products on the Teradyne IP750 and KVD tester platforms
- Defined test methodologies, Test plans, and DFT requirements for new devices
- Worked with the product sustaining team, and offshore manufacturing sites to insure good hand-off for production release
- Responsible for CMOS Image Sensors Test Program and hardware development, released in to Manufacturing and sustaining it
- Developed production test programs on Teradyne IP750 ATE, MIPI CSI-2 serial interface data capture, high speed probe cards and transferring to offshore manufacturing facilities
- Analyze characterization data using JMP, dataPower, Galaxy software tools, calculated margins and overall yield, and implemented production test limits
- Pioneered in bringing Teradyne IP750 and TSK probing capabilities to the Image sensor group
- Overall in charge of setting up a test floor with portable clean room for newly acquired Teradyne IP750, Illuminator, and TSK probers
Senior Product and Test Engineer
National Semiconductor Corporation, CMOS Imaging Group
06.2003 - 07.2004
- Responsible for DVP (Digital Video Processor) and Image Sensor product development, release to manufacturing and sustaining it
- Developed production and characterization programs on LTX Fusion, D50 and KVD tester platforms to test and fully characterize digital video processors and image sensor devices
- Performed bench level testing of image sensors to characterize image performance
- Conducted root cause analysis on DVP SRAM failures
- LTX bit mapping technique was used to determine the common failure mode and to isolate faulty cells
Product and Test Engineer
National Semiconductor Corporation, Information Appliance (IA) Group
02.2000 - 05.2003
- Responsible for product development and release to manufacturing of 32-bit X86 SOC products
- Developed production and characterization programs according to the product specifications on LTX Fusion, LTX D50, Trillium Micromaster tester platforms
- Completed characterization over process, core voltage and temperature range; analyzed data to determine marginal, failing parameters and worked with designers to resolve issues
- Reduced DPPM by testing customer returns on bench, ATE and implementing required production screens
- Performed in-depth failure analysis and implemented corrective actions
- Performed system-level performance analysis using application programs, completed correlation between bench and ATE
- Monitored ET/WAT, yield data on a regular basis
Education
B.S. - Electrical Engineering
Wichita State University
Wichita, KS01.1999
Skills
- Operations management
- Cross-functional team coordination
- Operations planning
- Material processing
- Logistics support services
Timeline
Sr. Manager/Director, Test & Product Engineering
Allegro Microsystems/Crocus Technology, Inc
06.2021 - Current
Director, Test Engineering
InSyte Systems, Inc
06.2020 - 06.2021
Sr. Manager, Test Engineering
Movella/mCube, Inc
07.2011 - 06.2020
Staff Product Engineer
Pixim Inc.
01.2010 - 06.2011
Manager, Test Engineering
Eastman Kodak Company, CMOS Image Sensor Solutions Group
08.2004 - 11.2009
Senior Product and Test Engineer
National Semiconductor Corporation, CMOS Imaging Group
06.2003 - 07.2004
Product and Test Engineer
National Semiconductor Corporation, Information Appliance (IA) Group
02.2000 - 05.2003
B.S. - Electrical Engineering
Wichita State University
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