Summary
Overview
Work History
Education
Skills
Languages
Timeline
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Jixiang Ding

San Jose,CA

Summary

Professional verification specialist adept in validating and debugging complex hardware designs. Known for contributing to high-quality product releases through thorough testing and troubleshooting. Skilled in fostering team collaboration and adapting to evolving project needs, ensuring reliable and timely results.

Overview

4
4
years of professional experience

Work History

Senior ASIC Verification Engineer

Synopsys
05.2022 - Current
  • Built complicated testbench to accurately verify the basic working flow of DUT and advanced features.
  • Enhanced team productivity with well-documented test plans and reusable test environments.
  • Utilized advanced debug tools to effectively isolate issues and resolve them quickly and accurately.
  • Developed comprehensive test cases to validate design specifications, increasing overall product quality.
  • Implemented coverage-driven verification techniques for improved test effectiveness and resource allocation.

ASIC Engineer Intern

Cisco
04.2021 - 06.2021
  • Implemented the system verification on JTAG with UVM and report errors to achieve perfect design
  • Implemented the modules verification with built-up test-bench in UVM to achieve perfect design
  • Assist verification engineers on project Silicon One to obtain better understanding of SV/UVM

Education

Master of Science - Electrical and Computer Engineering

University of Michigan
Ann Arbor, MI
12.2022

Bachelor of Engineering -

SiChuan University
06.2020

Skills

  • Skilled in Hardware Description Languages
  • Functionality Coverage Assessment
  • UVM methodology
  • Test Planning Expertise
  • Testbench Creation and Management
  • Constraint random verification

Languages

English
Full Professional
Chinese (Mandarin)
Full Professional

Timeline

Senior ASIC Verification Engineer

Synopsys
05.2022 - Current

ASIC Engineer Intern

Cisco
04.2021 - 06.2021

Bachelor of Engineering -

SiChuan University

Master of Science - Electrical and Computer Engineering

University of Michigan
Jixiang Ding