Summary
Overview
Work History
Education
Skills
Timeline
Generic

Julie Kim

Los Angeles,CA

Summary

Hardworking and passionate job seeker with strong organizational skills eager to secure ASIC / FPGA Design Engineer position. Proven track record in collaborating effectively with cross-functional teams, and adapting to evolving project requirements. Ready to help team achieve company goals.


Overview

21
21
years of professional experience

Work History

ASIC / FPGA DESIGN ENGINEER

Boeing
10.2021 - 12.2024
  • FPGA Lab Testing Analysis and Static Timing
  • Provided Support to DSP team by generating netlist and testing the functionality of the project
  • Implemented Vivado design methodology for synthesis, P&R, and optimizing timing by limiting fanout and combo logic, and adding pipeline register to efficiently close timing
  • ASIC Design and Documentations
  • Developed RTL design to interface with hard macro-IPs with or without communication protocol (AXI Stream, AXI Lite, or APB)
  • Wrote or integrated reusable test bench to verify design using Cadence simulation tools
  • Wrote scripting language (c-shell) for compilation, simulation and debugging RTL designs
  • Documented detail requirements and specifications for various ASIC block designs

Computer Hardware Sale Assistance

Zippy USA Inc
09.2019 - 02.2020
  • Consulted customers of Power Supply Models and Schematic Drawings to meet their needs

Dental Assistant

Family Dental
05.2004 - 11.2013
  • Provided personal care to patients to ensure their comfort and wellbeing during and post dental treatment
  • Assisted Dentist during a variety of dental treatments
  • Performed front office tasks in a fast-paced environment to meet appointment schedule time

Education

Master of Science - Computer Engineer

California State University Long Beach
Long Beach, CA
01.2023

Bachelor of Science - Computer Engineer

California State University Long Beach
Long Beach, CA
08.2019

Skills

  • ASIC design
  • FPGA programming
  • Timing analysis
  • Timing Closure
  • Java
  • C
  • C
  • Python
  • Tcl
  • Power on reset (POR)
  • DLLs
  • PLLs
  • ADC/DAC
  • HSS (High Speed Serdes)

Timeline

ASIC / FPGA DESIGN ENGINEER

Boeing
10.2021 - 12.2024

Computer Hardware Sale Assistance

Zippy USA Inc
09.2019 - 02.2020

Dental Assistant

Family Dental
05.2004 - 11.2013

Bachelor of Science - Computer Engineer

California State University Long Beach

Master of Science - Computer Engineer

California State University Long Beach
Julie Kim