Collaborative leader with dedication to partnering with coworkers to promote engaged, empowering work culture. Documented strengths in building and maintaining relationships with diverse range of stakeholders in dynamic, fast-paced settings.
Overview
15
15
years of professional experience
1
1
Certificate
Work History
Sr Applications Engineer
Pactron Inc
01.2022 - 10.2023
Organize discussions with customers from pre layout design, capture requirements, stack up and material analysis, analyze the cost and quality tradeoffs
Interact with probe card vendors for various types of solutions needed for probe card needle design and alignment, responsible for making rightful decisions best matches the design quality and budget
Review and plan multiple sessions with customer presenting the design files, SI and PI reports, sending periodic updates to customer at various stages in PCB design and manufacture and getting their approval to move forward
Act as liaison between customer and designers; facilitate technical design meetings with internal design teams to meet the deadlines in delivering PCBA boards to customer
Orchestrated in increasing sales and re orders by resolving manufacturing PCB test failures and resolving RMA board failures for customers
Work with BOM procurement team to resolve any supply chain issues, reserve material with PCB vendor during the DFM cycle
Partnered with sales and Finance in winning business, proposed areas to promote and expand businesses.
Senior Engineer
Tessolve DTS Inc, California
01.2015 - 02.2019
Single site Test program Development on Teradyne –Catalyst for RF SOC series switches with multiple TX/RX ports, Silicon bring up and debug
Final schematic design verification for DIB boards
Liaised with team provided wafer sort solutions for RF SOC switches using cascade and DC Membranes and conducted analysis on RF data for each membrane
Performed limit finalization and Yield analysis to improve data from 72% to 97% at wafer level
Voltage and temperature (125C and 25C) characterization at wafer level and high volume release to Production
Included MIPI RFFE patterns to carry out S- parameter debug on bench using test bench test setup and lab instruments
Knowledge on Reliability stresses (Pre-con, HAST, LTSL, HTSL, HTOL)
Performed Silicon debug RMA devices received
Developed a framework to track all ongoing projects at various stages, improving the efficiency of weekly communications and eliminating 50% of all staff meetings
Test Program Development on Teradyne –Catalyst for Fuse OTP, silicon bring up and debug of multi reticle wafer at room and high temperature
Positively communicated and presented repeatable data after initial debug to customer proving the accuracy of ATE data Vs inaccurate simulation/Bench data provided by design team
Pivoted in winning series of Fuse OTP projects to the team
On boarding new hires and developing cross training program
Carried out Feasibility study for camera interface link SOC device(MIPI D-PHY) and quad site Test program Development on Advantest –Verigy 93k
Provided design inputs to the team during high speed (2GHz) DIB board development
Initial silicon debug
Spearheaded communication between design team, offshore team and reliability engineers to create patterns to suite the Infinity Oven requirements for HTOL board verification
Reporting status of project involved interaction with senior management and Customers directly on daily basis.
Product Development Engineer
Anora Semiconductor Labs
04.2011 - 04.2013
Test program execution and debug of electrical, functional characteristics of multiple series Opamp devices on TI-VLCT tester
Verifying data against the data sheet, finalizing limits and successfully released projects into series production at high volume for CP/FT
Included Customer specific electrical tests to validate RMA devices
Performed temperature and voltage Characterization on package parts
High volume release of data to production
Responsible in increasing the organization sales and revenue by 70% in the first quarter for a start-up
Feasibility study of high load current(10A) Audio Amplifier devices and the ATE, resource allocation, estimating the total time for the execution from board development to successful release of test program to production
DIB Board design and Schematic development for daughter board using Mentor graphic schematic tool, placement analysis
Test Program development for Audio amplifier devices on TI-VLCT, using the existing Opamp MOE servo loop board for dual and quad site solutions
Challenges faced in understanding the Opamp DIB board and maximized the use of same boards to provide test solutions for audio amplifier projects, optimizing department revenue
Initial bring up and test program debug of electrical, functional and device specific parameters
Test program release to production and provided solutions to issues raised.
Project Engineer
Wipro Technologies
12.2010 - 04.2011
Orchestrated team of two to provided solution by fixing test program bugs and code conversion from single site code to multisite (16), challenges involved in multi site debug
Revamped outdated documents for multisite debug.
Test Engineer
Tessolve Semiconductor Pvt Ltd
06.2008 - 12.2010
Liaised with senior leadership and sought feedback and input during test program development, provided schematic development guidelines to PCB team
Designed multi site ATE test board fixtures, released production and characterization test solutions for VCA devices on TI-VLCT tester
Debug of electrical DC, AC parameters
Added board diagnostics code to verify on board components
Successfully released FT test solutions to high volume production
Provided design parameters to LABVIEW team to upgrade older GUI test routines software to test 45nm DPLL SOC device, test sequences development on bench using NI Test Stand and Labview8.2
Debugging close loop, open loop conditions
Interaction with designers, identifying and highlighting the design related issues during initial device bring up
PVT Characterization using silicon thermal on bench for packaged parts across nominal, cold and hot lots
Orchestrated team of two to provided solution by fixing test program bugs and code conversion from single site code to multisite (16), challenges involved in multi site debug
Revamped outdated documents for multisite debug.
Education
Bachelor of Engineering - Instrumentation Technology
MSRIT Affiliated To VTU
Bangalore, India
06.2007
Skills
Sr Application Engineer with ~2 years of experience in customer facing roles, PCB design and manufacture
Expertise in validating RMA PCB’s from customer and providing accurate solutions
Sr Test Engineer with 8 years of experience in IC Testing and Reliability testing for mixed signal and Digital devices
Proven track record for carrying out device debug successfully and presenting accurate test results to customers
Provided design solutions to help to improve the DIB board to customers
Previously developed test program for high speed and mixed signal SOC’s on ATE, wafer with successful release to production
Experience in reliability test and pattern generation for HTOL boards
Posses high analytical and experience working independently and collaboratively to achieve department goals
Ability to communicate complex situations clearly and conveying difficult message in a positive manner