- Computer Architecture
- Digital Logic (RTL) design for ASIC & FPGA
- Physical Design
- Timing Analysis
Production Engineer Intern
ASML
05.2023 - 08.2023
- Transmission Image Sensor (TIS) Diffuser Module - Updated the outdated testing procedure, verified functionality, and successfully qualified and deployed 8 units to the field
- DUV Reticle Stage Leak Tester - Identified and repaired the leak using a helium sniffer, updated the software, and implemented significant improvements
- Pulse Purge with Arduino - Developed an Arduino-based device to automate the helium pulse purge process, replacing the previously manual operation
