Linda Zeng
Davis,CA
Summary
7 Years Power and Performance (PnP) projection experience on Intel Graphics, 7 years Server PnP analysis and optimization experience, 6 years software development experience in C++ and Python.
Overview
21
21
years of professional experience
Work History
Platform Architect
Intel Corp
01.2010 - Current
- Led AI workloads PnP projection activities on Intel accelerators (GPUs and VPUs)
- Defined Intel next Gen edge GPUs SKU stack through lots of architecture explorations and what-if analysis.
- Developed PowerBench tool for AI workloads power modeling and projections on Intel VPUs
- Achieved 20% energy efficiency improvement of communication/networking and customer workloads on several Intel servers through power managements
- Collaborated with several teams in Data Center and Software groups to achieve 30% performance per dollar improvement on HSX systems in Alibaba
- Led HPC energy efficiency benchmark work group to develop a benchmark tool to access energy efficiency of 6 HPC workloads in multi-node cluster
Senior Software Engineer
Intel Corp
01.2004 - 01.2010
- Led and developed the Interconnect Planning Tool (IPT) to enable Die and Package escape solutions
- Developed Hex Pattern Breakout Routing Tool to autoroute hex pattern pins with line and arc segments
- The tool has been deployed to several external ODM/OEMs (EMC, Cisco, Wistron, PalPilot Corp, etc) in USA and Taiwan
- Developed Package Embedded Device Manager converted HFSS 3D structures to Cadence 2D layout tools
- PEDM is the first developed tool in the EDA industry to automate the 3D models to 2D layouts conversions
- Developed Layout Constraint Tool (LCT) to automatically check if the physical routings of a PCB or Package design meet certain design constraints
Education
M.S.E. - Electrical and Computer Engineering
Purdue University
West Lafayette, INM.E - Mechanical Engineering
Huazhong University of Science and Technology
B.S. - Mechanical Engineering
Huazhong University of Science and Technology
Skills
- Power and Performance Projection
- Power Modeling
- Power Management
- Software Design Methodology
- Programming in Python, C and C
- Project Management
Publications
4 Patents, 6 Intel Trade Secrets, 9 DTTC papers, 4 DTTC demos, 1 SWPC presentation, 1 IATTJ paper, 1 IMTES paper
Timeline
Platform Architect
Intel Corp
01.2010 - Current
Senior Software Engineer
Intel Corp
01.2004 - 01.2010
M.E - Mechanical Engineering
Huazhong University of Science and Technology
B.S. - Mechanical Engineering
Huazhong University of Science and Technology
M.S.E. - Electrical and Computer Engineering
Purdue University
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