A skilled Technical Leader with 18 years of experience in Intel, leading multiple First-of-Kind equipment, factory start-up and ramps. Result-oriented project lead, with experience in developing, implementing, and supporting equipment with a steep ramp. Experienced in building high performance and engaged teams. Comfortable with ambiguity and able to thrive in a face-paced environment.
Overview
19
19
years of professional experience
Work History
Senior Technical Lead
Intel Technology
Kulim Die Sort Die Prepare (KMDSDP)
08.2018 - Current
Led the KMDSDP SDX startup and ramp, IQ TPT optimization, NTI and operation excellence
Responsible to identify and fix systemic issues in Die Sort
Led multiple task forces, Drive continuous improvement projects and methodology changes in the Virtual Factories for cost savings/avoidance, module availability improvements and product ramps
Co-developed and conducted L4 advanced troubleshooting training to enhance factory capability, eliminating FSE within 2 years of factory startup, with $31M savings
Enabled Intel to perform cell IQ and hardware upgrades, with $1.6M savings
Partnered with IMR and demonstrated 8 SDX chiller repairs internally amounting to $2.6M savings and enabled Helium usage reduction amounting to $1.5M saving
Provide remote assistance to the virtual factories for issue debugging and resolution
Lead factory technical development programs for technical leads
Member of the ATM Technical Steering Council and Malaysia Site leadership program.
Technical Lead
Intel Technology
Penang Assembly And Test (PGAT)
07.2015 - 08.2018
Supported the development and validation of the HDMx equipment and Thermal Actuation Pan in STTD Chandler, Arizona
Influenced and collaborated with TD to design and validate the Gen 2 HDMx Server Actuation Pans
Identified major firmware bugs, hardware issues and fixes
Managed the schedules and project timelines to intercept sustainable and user friendly changes
Designed the HDMx Lifter, service cart and test bench to support collateral transport, troubleshooting and validation
Developed the HDMx Thermal and Actuation Pan training material and trained Engineers, Technicians and developed other trainers in TD/VF
Supported the HDMx startup and ramp in Intel Vietnam Vietnam Assembly/Test VNAT, Intel Kulim Kulim Assembly/Test KUAT and Intel China Chengdu Assembly/Test CDAT
Resolved HFE leaks and stain on die seen in extreme cold testing temperatures
Established as a HUB to perform remote and on-site troubleshooting support for the ATM factories.
Equipment and Process Engineer
Intel Technology
Kulim Microprocessor Organization (KMO)
06.2005 - 07.2015
Responsible for timely deployment, installation, and qualification of test module to support product or package startup and ramp
Started up and ramped FOK mixed-signal Teradyne testers, CMT testers and Extreme handlers
Established new sustaining and maintenance process for the HDMT Actuation Pan, with HDMT being a FOK tool designed by Intel and leading the first site startup and ramp
Developed the HDMT Thermal and Actuation Pan training material and trained Engineers, Technicians and developed other trainers in TD/VF
Enabled cold testing on the HDMT by resolving condensation issues in the tool and enabling the chiller to support cold testing condition
Led multiple quality improvement projects to address stain on die, die crack, handling time, thermal failures, heater burns, HFE valve reliability issues
Supported the startup and ramp of the HDMT equipment in Intel Vietnam Vietnam Assembly/Test VNAT and Intel Kulim Kulim Assembly/Test KUAT.
Education
Bachelor of Science - Electrical And Electronics Engineering
University Tenaga Nasional
Malaysia
Skills
Cross-functional task forces
Stakeholder Management
Strategic Planning
Advanced Troubleshooting
Equipment Training
Project Management
Data Analysis
Leadership
Team Mentoring
Flexibility and Adaptability
Passions
Reading, Innovating
Languages
Malay
Native or Bilingual
Tamil
Professional Working
English
Full Professional
Additional Information
6 Technical Publication related to Thermal Solution and HDMT
Timeline
Senior Technical Lead
Intel Technology
08.2018 - Current
Technical Lead
Intel Technology
07.2015 - 08.2018
Equipment and Process Engineer
Intel Technology
06.2005 - 07.2015
Bachelor of Science - Electrical And Electronics Engineering