Summary
Overview
Work History
Education
Skills
Project
Hobbies
Timeline
Generic
MANASA TEJA LALUGANI

MANASA TEJA LALUGANI

Eden Prairie,MN

Summary

Highly creative and results-oriented professional adept at tackling challenges with innovative solutions. With a proven history of driving impactful outcomes, I excel in strategic problem-solving and possess a keen ability to collaborate effectively across diverse teams. I’m deeply committed to continuous learning and staying abreast of emerging trends, ensuring I bring fresh perspectives and transformative ideas to any organization I work with. My passion for excellence and dedication to driving positive change makes me a valuable asset poised to contribute meaningfully to your team.

Overview

1
1
year of professional experience

Work History

Programmer Analyst,

Cognizant Technologies Solutions
HYD, Telangana
08.2022 - 08.2023
  • During my tenure at Cognizant Technology Solutions as a Programmer Analyst, I specialized in providing administrative support for SAP Business Objects. This involved proficiently migrating reports across various environments such as TEST, QA, and DEV, ensuring seamless transitions and optimal functionality. Additionally, I diligently monitored client correspondence, promptly addressing any reported errors or concerns within the project framework. Through these responsibilities, I honed my skills in project coordination, troubleshooting, and client communication, contributing to the successful execution of projects and fostering strong client relationships.

Education

Master of Science - Information Technology And Management

Concordia University St Paul
Saint Paul, MN
12-2024

Bachelor of Technology - Electronics And Communication Engineering

Vardhaman College of Engineering
HYD, Telangana, India

Skills

  • SAP BODS
  • SQL
  • Communication
  • Basics of Python
  • Presentations
  • Analytical Skills

Project

Title: Memristor Based Accurate Radix-4 Adder

  • The project focuses on implementing an "Accurate Radix-4 Adder" using memristors instead of traditional logic gates.
  • The circuits are simulated using Cadence Analog Design Environment at the 45nm Technology node, with a VDD of 1V.
  • Memristor-based adders exhibit lower power consumption, reduced delay (albeit by a marginal 5%), and decreased area requirements, indicating superior performance in multiple aspects.
  • The project concludes that memristor modeling offers advantages over CMOS technology, particularly in terms of power-delay product, where a significant reduction of 49% is observed.

Hobbies

  • Web Surfing
  • Singing
  • Dancing
  • Photography

Timeline

Programmer Analyst,

Cognizant Technologies Solutions
08.2022 - 08.2023

Master of Science - Information Technology And Management

Concordia University St Paul

Bachelor of Technology - Electronics And Communication Engineering

Vardhaman College of Engineering
MANASA TEJA LALUGANI