Summary
Overview
Work History
Education
Skills
Accomplishments
Disclaimer
Timeline
Generic

Manogna GUMMADI

Campbell,CA

Summary

Design Verification Engineer with 11 years of experience at AMD, specializing in IP and SoC verification. Expertise in SystemVerilog and UVM, resulting in improved system reliability and efficiency. Proven ability to collaborate across functions, delivering comprehensive testing solutions that ensure data integrity and performance.

Overview

11
11
years of professional experience

Work History

Service Provider

AMD
San Jose, CA
02.2025 - Current

Project: ATC verification within NVMe Subsystem.

  • Enhanced system reliability by coding various error scenarios in NVMe subsystem.
  • Created interrupt service routine to facilitate efficient task management within ATC.
  • Refined ATC block drivers, monitors, and scoreboard to ensure robust functionality during testing.

Member of Technical Staff

Mirafra Technologies
Bangalore , Karnataka
02.2024 - 01.2025

Project: SOC Bringup.

  • Executed integration of 20+ Synopsys VIPs at SoC, followed by thorough end-to-end testing using test cases.
  • Designed UVM testbench architectures for each VIP to enhance testing efficiency.

Member of Technical Staff

AMD
Bangalore , Karnataka
08.2020 - 02.2024

Project 1: IOMMU in MI300 SoC.

  • Executed comprehensive test plans for MI300 IOMMU, encompassing sanity, error, and smoke tests.
  • Verified nested address translations while implementing cache management and security protocols.
  • Authored functional coverage documentation to ensure thorough feature testing verification.

Project 2: NBIO in MI300 SoC.

  • Supported team during subsystem bring-up for MI300 NBIO project.
  • Coded sequences for different request types.
  • Tested end-to-end data paths and added data integrity scoreboard checks.

Project 3: IOMMU in MI450 SoC.

  • Collaborated on virtualization aspects of MI450 IOMMU project.
  • Developed IOMMU test plan with extended features to enhance testing scope.

DV Enginner

Chelsio Communications
Bangalore , Karnataka
01.2018 - 08.2020

Project: Cache

  • Developed and verified a 2 MB cache verification model.
  • Exercised cache mechanism features, like cache flush, cache update, and eviction.

DV Engineer

Prodapt ASIC services (Formerly Innovative Logic)
Bangalore , Karnataka
09.2015 - 12.2017

Project 1: DMA (Direct Memory Access)

  • Developed and verified the MEMORY-IO, IO-MEMORY, MEMORY-MEMORY, and IO-IO write and read operations with different data sizes.

Project 2: AXI4

  • Verified all types of read/write transactions, burst transactions, error handling, and data integrity.

Intern Engineer

Maven Silicon VLSI Training Center
Bangalore , KARNATAKA
06.2014 - 08.2015

Project: AHB

  • Developed single master and slave, SV and UVM testbench to enhance testing capabilities.
  • Created sequences for testing various request types with supported burst lengths and sizes.

Education

Bachelor of Technology - Electronics And Communications Engineering (ECE)

Acharya Nagarjuna University
04-2013

Skills

  • IP and SoC verification
  • SystemVerilog and SVA expertise
  • UVM certification
  • Simulation tools proficiency like Synopsys, Cadence, and Questa
  • Industry-standard protocols knowledge
  • AXI, AHB, DMA, and IOMMU virtualization
  • PCIe and CXL fundamentals
  • Bug reporting tools Jira, Bugzilla

Accomplishments

  • Received the Individual Excellence award from Chelsio Communications 2019.
  • Received AMD Spot Light Award for 2021
  • Received AMD Executive Spotlight Award for the MI300 project's successful completion in 2022

Disclaimer

I hereby declare that all the details furnished are true to the best of my knowledge.

                                                                                                

                                                                                                                     Thanks,

                                                                                                                     Manogna

Timeline

Service Provider

AMD
02.2025 - Current

Member of Technical Staff

Mirafra Technologies
02.2024 - 01.2025

Member of Technical Staff

AMD
08.2020 - 02.2024

DV Enginner

Chelsio Communications
01.2018 - 08.2020

DV Engineer

Prodapt ASIC services (Formerly Innovative Logic)
09.2015 - 12.2017

Intern Engineer

Maven Silicon VLSI Training Center
06.2014 - 08.2015

Bachelor of Technology - Electronics And Communications Engineering (ECE)

Acharya Nagarjuna University
Manogna GUMMADI