MANOJ VISWAMBHARAN

C4ISR Systems, Electronic Systems

• Firmware Lead for the Link16/TACAN Terminal Tester project
• My expertise in Xilinx RFSoC platforms and cryptography resulted in successful design of Link16 and TACAN waveforms and implementation of an NSA certifiable Crypto Subsystem (AES256)
• Designed the DS101 fill port and developed NSA WATARI (AES256+SHA384) firmware, utilizing SystemVerilog for testbenches and providing pseudo driver code to the software team
• Oversaw all phases of the project, including requirements, budgeting, VHDL coding/simulation, FPGA timing closure, and coding and testing software in C++ for Microblaze and ARM processors
• My efforts to streamline development by splitting crypto protocol handling between Microblaze cores and firmware resulted in completing the firm fixed price project under budget and ahead of schedule.

Space and Aerospace Division

• Successfully led a team of eight FPGA engineers, balancing 80% hands-on development with 20% management responsibilities
• Made notable contributions as the lead FPGA engineer on a $150M electronic warfare system program (ViperShield), architecting and implementing FPGA solutions with cutting- edge hardware and Xilinx design tools
• My expertise in Xilinx and Intel tools and methodologies allowed for efficient timing closure and Ethernet IP integration, resulting in FPGA designs running at up to 375 MHz
• Developed software for testing Xilinx MPSoC FPGAs and collaborated with software and design teams to deliver best-of-class solutions
• Responsibilities also included proposal development, project management, DevOps, mentoring and recruitment
• My contributions earned recognition with multiple awards for outstanding technical leadership.

• Completed security clearance process for L3Harris role while on garden leave (paid non-compete period)

Lead architect and designer of options market making and taking FPGA technology

• Successfully designed options market data parsers and order execution managers for multiple exchanges, including BATS, MIAX, NOM, ISE and ARCA using VHDL for RTL and SystemVerilog for testbenches
• Designed and implemented electronic eye strategies with industry- leading latency, achieving 90%+ fill rates, and made improvements to platform components such as TCP offload engine, DRAM, and Xilinx PCI Express DMA controller
• Architected a custom order routing gateway that allowed combining quoting traffic with proprietary trading orders to allow for those orders to have hirer priority at the exchange matching engine
• Wrote test software for these applications using my skills C++/C#
• My efforts resulted in a 50% reduction in system latency, improved order fill rates from 20% to 96% at the fastest options exchange (MIAX), and developed the fastest trading system on all deterministic latency exchanges at the time

• Successfully architected and designed custom hardware accelerators for high-frequency trading (HFT) systems utilizing Intel Stratix V FPGAs and low-level Intel x86 optimized software running on Linux
• I developed FPGA based feed handlers for multiple US Equities markets, including BATS, ITCH, NYSE OB, ARCA, and CME
• Used System Verilog DPI to effectively interface C++ software testbenches to RTL under test
• My successful leadership and technical expertise led to the sale of the company to a private customer.

Investment Banking IT, Global Arbitrage Trading

• Responsible for the accelerator technology direction and development for the global arbitrage trading group within Credit Suisse
• As lead developer and project manager, I oversaw eight developers building ultra-low latency, high frequency trading systems based on FPGAs (Xilinx Virtex 5), zero-copy Linux device drivers, tuned real-time Linux kernel, and cache efficient low level x86 software
• Implemented feed-handlers for US Equities markets (BATS, Nasdaq ITCH, NYSE ARCA, OpenBook Ultra, Direct Edge, CQS, and UQDF) and achieved sub 2us normalizing market data and sub 2us order book building on ordinary Nehalem servers
• Collaborated closely with the application development and business users to develop performance targets for latency, throughput, and determinism, and reduced the latency of the Feed Handler by 99% using low-latency software and FPGA design.

• I worked as a contract engineer on the Main Radar Test Set project
• I rescued the project which was lagging behind for 6 years by implementing a test-driven FPGA DevOps process
• Due to my efforts, I was promoted to manage the team.

Technicolor's Corporate Research Lab, I was part of a team that was tasked with inventing IP for Thomson to use internally and license to the world.

• One of my proudest accomplishments was inventing "Content Resumption Across Devices," which is now used by billions of people worldwide.
• Responsible for various projects including the development of an FPGA based prototype for the ATSC Mobile and Handheld Receiver ASIC and a WCDMA receiver FPGA prototype for UMTS base stations and user equipment.
• Developed DSP IP like Equalizers, FFT, FIR, DUC, DDC, Matched Filters, Direct Sequence Spread Spectrum receivers, and polyphase filters.
• Served on Thomson's Patent Review Council, where I generated Patent disclosures and worked with IP attorneys to get them through the patent application and review process.

• Solely designed central low latency 40Gbps IP Packet Switch Fabric Card and Switching FPGA for a carrier class IP over Optical Dense Wavelength Division Multiplexing (DWDM) Router
• Designed the GHz speed PCB for switch fabric card using simulation tools to verify signal integrity
• Switching FPGA was designed and verified using Verilog
• Won the COMNET 2001 Best New Product Award and was named Telecommunications Product of the Month (Dec 2000).

Mobile Products Division.

• I played a critical role in the success of the $150M/AUM Mobile Products Division.
• I helped found Accessworks Communications, an Ethernet over ISDN Modem company, with four engineers. Within one year of its inception, we successfully grew the business and sold it to 3Com for $8 million.
• I went on to develop hardware and firmware for various high volume 3Com networking products at the Santa Clara office, and ensured their homologation to over 30 countries.