Summary
Work History
Education
Skills
Coding And Automation Projects
Timeline
Generic

Manvitha Udamula

Austin,TX

Summary

Physical Implementation Engineer with hands-on experience across RTL-to-GDSII flows, specializing in timing closure, partitioned implementation, and cross-functional collaboration. Demonstrated strengths in flow optimization, scripting, and developing scalable infrastructure for physical design. Currently seeking to transition into a CAD role to expand impact through tool development and flow ownership within Arm Austin.

Work History

Engineer – Physical Implementation

Arm
Austin, USA
- Current
  • Company Overview: CE-CPU Group, Arm Austin, TX | [Month Year] – Present
  • Partnered closely with RTL and architecture teams to meet PPA goals through feedback on IPC, structure growth, and timing fixes.
  • Drove timing closure at LAC and EAC levels by evaluating timing, power, congestion, area, and density across vector unit partitions.
  • Led the partitioning and physical implementation of the Vector Unit block; tackled cross-boundary and integration challenges.
  • Contributed to BUP flow adoption during the Teton project, ensuring compatibility and scalability across blocks.
  • Engaged deeply in VecIssue implementation under the Teton and Capitan programs.
  • CE-CPU Group, Arm Austin, TX | [Month Year] – Present
  • Simplified personal design documentation by integrating existing utilities and checks, consolidating outputs into a single view—reducing review time and easing RTL collaboration.
  • Developed a Tcl script using regular expressions to automate new port placement based on existing bus structures, improving over the legacy method.
  • Initiated integration of power flow within implementation to eliminate redundant manual execution, streamlining the signoff process.

Assistant Systems Engineer

Tata Consultancy Services Ltd.

Education

Master of Science - Electrical Engineering

The University of Texas At Dallas
Richardson, TX
12-2019

Skills

  • EDA Tools: Cadence Innovus
  • EDA Tools: Genus
  • Scripting: Tcl
  • Scripting: Shell
  • Scripting: basic Python
  • Design: Floorplanning
  • Design: placement optimization
  • Design: port budgeting
  • Design: timing closure
  • Methodology: Bottom-up flow integration
  • Methodology: partition-based design
  • Methodology: vector unit implementation
  • Projects: Teton
  • Projects: Capitan (VecIssue focus)

Coding And Automation Projects

  • Simplified personal design documentation by integrating existing utilities and checks, consolidating outputs into a single view—reducing review time and easing RTL collaboration.
  • Developed a Tcl script using regular expressions to automate new port placement based on existing bus structures, improving over the legacy method.
  • Initiated integration of power flow within implementation to eliminate redundant manual execution, streamlining the signoff process.

Timeline

Engineer – Physical Implementation

Arm
- Current

Assistant Systems Engineer

Tata Consultancy Services Ltd.

Master of Science - Electrical Engineering

The University of Texas At Dallas