Summary
Overview
Education
Skills
Websites
Projects
Certification
Timeline
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Mejalin Arno

Minneapolis,MN

Summary

Looking for entry-level hardware development internship with a strong desire to apply my education to root cause analysis in hardware product development. Background working with cutting-edge technologies and emerging concepts with tools like Cadence Virtuoso, Synopsys and ChampSim.

Overview

1
1
Certification

Education

Master of Science - Electrical And Computer Engineering

University of Minnesota - Twin Cities
Minneapolis, MN
06.2025

Bachelor of Engineering - Electronics And Communication Engineering

Madras Institute of Technology
Chennai
06.2023

Skills

  • Problem Resolution
  • Fluent in English, Tamil
  • Analytical Thinking
  • Familiar with Microsoft tools like Powerpoint and Word
  • Other Interests: History, Mathematics & Physics

Projects

Kogge Stone Adder 

Designed kogge stone adder during my undergraduate, which is a high-speed parallel prefix adder. The Xilinx software is used to synthesize and design the hardware. 


Smart Assistive System for the Visually Impaired

Designed a simple assistive system for the visually impaired using the Raspberry Pi, that alerts the user of any person or object in front of them.


SVD Processor

SVD processor which performs the operation of Singular Value Decomposition is designed, synthesized and its function is verified using Synopsis tools like Verdi and Design Compiler Shell. 


Accurate Determination of Logical Effort Parameters in ASAP7

Using Cadence Virtuoso, Hspice simulations are made on inverters, 2-input Nor and 3 -input Nand gates to measure their delays for various electrical effort values. Based on that, the logical efforts of these gates are calculated. 


99-Stage Ring Oscillator 

Using the automated place and route tools of cadence virtuoso, a 99-stage ring oscillator with a Nand control gate is designed.


Cache replacement policy based on Re-reference count 

An advanced cache replacement policy, which is based on defining a threshold on the re-reference count is implemented, which significantly reduces L2 level cache misses and improves the performance.

Certification

Smart Assistive System for the Visually Imparied

ICSME 2023 - Conference ParticipationICSME 2023 - Conference Participation

United Latino Students Association

https://netcredential.com/verify/LR0Xf052b7

Timeline

Master of Science - Electrical And Computer Engineering

University of Minnesota - Twin Cities

Bachelor of Engineering - Electronics And Communication Engineering

Madras Institute of Technology
Mejalin Arno