PALPANDI PERUMAL
Cupertino,CA
Summary
Principal Software Engineer with 12+ years building high-performance networking and analytics platforms in data-center and NFV environments. Deep expertise in SDN-NFV, L2/L3 HA, and sub-second reconvergence, with recent focus on observability, diagnostics, and ClickHouse-based analytics. Known for owning complex systems end-to-end, driving P1 incidents to closure.
Overview
13
13
years of professional experience
Work History
Principal Software Engineer
Gigamon, Inc.
Santa Clara, CA
01.2025 - Current
- Lead diagnostics and observability for the AMX analytics platform, including per-broker Kafka health checks and HTTP exporter diagnostics to make network/tool-side failures debuggable.
- Built and tuned ClickHouse pipelines and queries for high-volume network telemetry, with emphasis on performance, correctness, and efficient retention.
- Partner with infra, FM, and support teams to drive root-cause analysis and long-term fixes across exporters and data pipelines.
Principal Engineer
Arista Networks
Santa Clara, CA
01.2022 - 01.2025
- Drove Macro Segment Security, converting rich field-sets into scalable, hardware-enforced label-based policies for zero-trust (ZTX) architectures.
- Designed and delivered Aegis Hitless, enabling hitless security-policy updates by coordinating hardware resource synchronization; served as release manager and lead implementer.
- TACC, Python
Principal Engineer
Pluribus Networks
Santa Clara, CA
01.2018 - 01.2022
- Integrated FRR 7.2 EVPN into Netvisor, adding MAC-mobility and an event-snoop interface to bridge PN’s proprietary databases with FRR.
- Designed and implemented VSG (Virtual Service Group) to define routing policies across distributed VRFs for east-west data-center traffic.
- Re-architected BGP reconvergence to an event-driven model to meet sub-second SLAs; led the FRR 4.0 → 7.2migration and owned static-BFD integration end-to-end.
- Delivered TCP Cluster Analytics, introducing inter-node synchronization of TCP SYN/SYN-ACK metadata to accurately reconstruct TCP sessions in clustered deployments.
Senior Software Engineer
Gigamon Technologies
Chennai, India
01.2017 - 01.2018
- Designed and implemented the Unified Gateway to offload mgmtD from northbound requests, including SQLite schema design, end-to-end implementation, unit testing, and production hardening.
Senior Software Engineer
Aricent Technologies
Chennai, India
01.2013 - 01.2017
- Implemented targeted BGP route advertisement and separate administrative distances for iBGP and eBGP to support advanced routing policies.
- Delivered L2TPv3 support to tunnel Layer-2 traffic over IP on XCAT-based platforms.
Education
B.E. - Electronics and Communication Engineering
Madras Institute of Technology
01.2013
Higher Secondary School - undefined
SUM Hr. Sec. School
01.2009
Skills
- Languages: C, C, Go, Python, TACC
- Networking: EVPN, VRF/DVRF, VXLAN, VLAN, BGP, BFD, VRRP, QoS, sFlow, vFlow, TCP/IP
- Platforms / Chipsets: Linux, Broadcom Trident (pipeline, low-level registers)
- Domains: SDN-NFV, data-center / DCI, network analytics, deep observability
- Tooling: Wireshark, IXIA, GDB, Cscope, Ctags, Git, Mercurial, Jira, Bugzilla
- Open Source: FRR, Quagga, OVS
LANGUAGES
English
Tamil
PUBLICATIONS & COMMUNITY
- Internet-Draft author – “FSM Health Status in BFD” (IETF).
- Contributor to FRR 7.2 and Quagga routing stacks.
Timeline
Principal Software Engineer
Gigamon, Inc.
01.2025 - Current
Principal Engineer
Arista Networks
01.2022 - 01.2025
Principal Engineer
Pluribus Networks
01.2018 - 01.2022
Senior Software Engineer
Gigamon Technologies
01.2017 - 01.2018
Senior Software Engineer
Aricent Technologies
01.2013 - 01.2017
Higher Secondary School - undefined
SUM Hr. Sec. School
B.E. - Electronics and Communication Engineering
Madras Institute of Technology