Payton Pagan

Winter Springs,FL

Overview

years of professional experience

Work History

Traffic Engineer Intern

DRMP

Orlando, Florida

06.2024 - Current

Contributed to development of ITS, signing and pavement marking plans for municipal and DOT projects.
Integrated ITS electrical service points into construction plans, verifying elevation, accessibility, and voltage compatibility.
Reviewed conductor sizing and circuit configurations to ensure reliable power distribution.
Identified fiber splice locations in design and developed splicing diagrams and device wiring schematics.
Evaluated conduit routing and pull box layouts, determining appropriate installation methods.
Performed quality control reviews and field verification to ensure design accuracy and compliance.
Prepared cost estimates, quantity tabulations, technical documentation, preliminary design reports and FAA coordination spreadsheets.

Electrical Engineer Shadow

Buckeye Control, Inc.

Winter Park, Florida

06.2023 - Current

Assisted in assembly of industrial control panels, installing components according to electrical schematics while gaining hands-on understanding of relays, terminal blocks, and control devices.
Drafted and updated panel layout drawings and as-built documentation in AutoCAD for client deliverables.
Incorporated engineering markups into technical drawings to reflect final panel configurations.
Supported development of control panel documentation from initial design through final client submission.
Gained exposure to PLC hardware and industrial automation systems.

Education

Bachelor of Science - Electrical Engineering

University of Central Florida

Orlando, FL

05-2028

Skills

Programming: C, MATLAB
Engineering Software: AutoCAD, OpenRoads Designer, Bluebeam Revu
Circuit & Electrical: Electrical Drafting, Circuit Analysis, Digital Logic, Breadboarding, Multimeter
Simulation & Data: LTspice, Microsoft Excel

Projects

FPGA Digital Systems Design & Verification

Verilog, Xilinx Vivado, Artix-7 FPGA

Designed and implemented combinational and sequential digital circuits including adders, multiplexers, decoders, latches, flip-flops, and finite state machines
Developed behavioral and exhaustive Verilog testbenches to verify functionality using waveform simulation
Performed synthesis, implementation, and bitstream generation in Vivado for FPGA deployment
Applied Boolean simplification and logic optimization techniques to reduce circuit area
Validated hardware performance using onboard switches, LEDs, and timing analysis

Linear Circuits Design & Analysis Projects

Designed and analyzed resistive and RC circuits including Thevenin equivalent networks and time-delay circuits
Applied node-voltage and mesh analysis to predict circuit behavior and validate results
Measured voltage, current, and transient response using oscilloscope and laboratory instrumentation
Compared theoretical, LTspice simulation, and experimental data to evaluate accuracy and identify sources of error

Timeline