Premnath Xavier Francis
Hardware Engineer
SanJose,CA
Summary
Diligent electrical engineer with 8+ years of expertise working in the semiconductor industry. Results-oriented achiever with proven ability to exceed targets and drive success in fast-paced environments. Combines strategic thinking with hands-on experience to deliver impactful solutions and enhance organizational performance.
Overview
8
8
years of professional experience
5
5
Languages
Work History
Hardware Engineer
Cisco Systems, Inc.
02.2023 - Current
- Specify, design, and validate fully automated System Level Test (SLT) hardware and software, and
work with cross-functional teams to implement a successful SLT solution to deliver high-quality
products - Participate in SLT system requirements definition, development, and system bring-up at both NPI
labs and High-Volume Advanced Manufacturing OSATs - RMA debug to reproduce customer failures, improve test coverage and Failure Analysis
- Work with hardware and software teams to evaluate functional device yield and performance across
various operating conditions, characterize hardware/software interaction, and develop effective
production tests to reduce Defective Parts per Million (DPPM) - Collaborate with production sustaining teams for test program and flow updates, lot disposition, test
time reduction, yield improvement, analysis, etc.
Staff Engineer - Silicon Validation
Qualcomm Technologies inc
5 2022 - 02.2023
- Responsible for developing and executing Silicon Characterization and Validation plans for complex SOC
- PVT Vmin margining across corner silicon
- Worked closely with supporting teams in design, diagnostics, emulation, firmware, design verification and software to ensure readiness for first silicon arrival, enablement of IP functionality upon silicon arrival, and debug of critical features
Sr Product Engineer, Image Sensing Group
On semiconductor
09.2019 - 04.2022
- Product development of image sensors and processors from post-silicon to mass production
- Responsible for driving and overseeing completion of design validation, silicon debug, yield analysis, yield improvement plans, PVT analysis, quality check plans
- Automated test flow generation using VB
- Solid understanding of Tessent DFT flow for MBIST & SCAN insertion, ATPG and verification
- MBIST validation, Memory repair & diagnosis using Tessent Silicon Insight and pattern generation
- Developed memory bitmapping scripts for multiple products
- SCAN testing at ATE, SCAN fail debug & diagnosis using Tessent Yield Insight
- Failure debug and test coverage improvement at ATE testing
- Hands on experience on micro-probing, oscilloscopes, signal generators, and multimeters
- Regularly monitored and analyzed production volume data using Python, JMP, DataPower to identify yield issues
- Worked closely with test development team to optimize the test program and test time reduction and also ensured that product conforms to data sheet specifications
Product Engineering Intern
ON Semiconductor
01.2018 - 05.2019
- Understanding the floor planning of several Image Signal Processors and Sensors
- Reverse engineering several memory blocks and developing methodologies to map the MBIST failures on the Die
- Reviewing of IO pad layouts, PLL and MIPI Rx and TX blocks
- MBIST debug of ISPs on bench and ATE
- Focus on new circuit IP such as memories, OTPM, serial communication standards and new DFT test modes
- Failure analysis support was a key component of this position
- Defining validation and debug of new and derivative products including test-chips targeted at circuit and process bring-up, yield, reliability, and overall manufacturability
Project Engineer
Wipro Technologies LTD
01.2014 - 12.2016
- Analog and Mixed Signal layout Design on 14nm, 28nm and 65nm technology nodes
- Responsible for Physical Design and verification, Custom Place and Route, Reliability verification, Standard cell characterization, ECO Implementation
Education
M.S - Electrical Engineering, Physical Design Automation, Advanced VLSI Design, ASIC Design, Design and Analysis of Reconfigurable systems, Advanced Digital Logic design, VLSI Design, Computer Architecture, Analog IC Design, PMIC Design, Semiconductor Process Integration
The University of Texas At Dallas
Dallas, TX 01.2017 - 08.2019
Bachelor of Engineering - Electronics and communication
SJB Institute of Technology
06.2010 - 05.2013
Diploma - Electronics and communication
Baldwins Polytechnic
06.2007 - 05.2010
Skills
Design Validation and Silicon Debug
Silicon Characterization
PVT Analysis
MBIST Diagnosis
SCAN Diagnosis
Failure Analysis
Yield Analysis
DataPower SpotFire
Serial IO
Python C JMP
Tessent Yield insight
Tessent Silicon Insight
Tessent DFT Flow
PYTHON C VB PERL Verilog TCL
Encounter
Synopsys ICC
NI LabVIEW
xilinx Tools
Mentor Graphics Calibre
Design Compiler
Interests
- Music & Film: Engages with diverse genres, appreciating artistic and cultural narratives.
- Camping: Enjoys outdoor activities and exploring natural landscapes.
- Cooking: Enjoys experimenting with flavors and techniques.
- Electronics: Skilled in building and debugging electronics, applying technical insight and innovation.
Timeline
Hardware Engineer
Cisco Systems, Inc.
02.2023 - Current
Sr Product Engineer, Image Sensing Group
On semiconductor
09.2019 - 04.2022
Product Engineering Intern
ON Semiconductor
01.2018 - 05.2019
M.S - Electrical Engineering, Physical Design Automation, Advanced VLSI Design, ASIC Design, Design and Analysis of Reconfigurable systems, Advanced Digital Logic design, VLSI Design, Computer Architecture, Analog IC Design, PMIC Design, Semiconductor Process Integration
The University of Texas At Dallas
01.2017 - 08.2019
Project Engineer
Wipro Technologies LTD
01.2014 - 12.2016
Bachelor of Engineering - Electronics and communication
SJB Institute of Technology
06.2010 - 05.2013
Diploma - Electronics and communication
Baldwins Polytechnic
06.2007 - 05.2010
Staff Engineer - Silicon Validation
Qualcomm Technologies inc
5 2022 - 02.2023