Summary
Overview
Work History
Education
Skills
Accomplishments
Timeline
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RAMKUMAR SENTHILNATHAN

Austin,Texas

Summary

Semiconductor test engineering professional with experience in test program development and debug with expertise in high-speed digital and mixed-signal tests. Setting goals in a team environment and working hard both independently and with teammates and achieving goals, learning information quickly and solving problems creatively as a Test lead.

Results-driven Senior Test Lead adept at ensuring high productivity and efficiency in task completion. Specialize in automated testing, performance analysis, and risk management. Excel in team collaboration, problem-solving, and adaptability to meet project deadlines and deliverables with quality outcomes.

Overview

14
14
years of professional experience
4
4
years of post-secondary education

Work History

Sr Test Lead

Tessolve Semiconductor
10.2018 - Current
  • Leading the Team ARM micro control , Motor control ,LED Driver project :
  • Team Size 16 people handling a team to delivered Digital , Aanalog devices with along 5 projects
  • Ownership taken for Digital board Design for SOC (microcontroller) SWD Protocol Testing & Flash trim using SWD protocol, Scan implementation & debug release in production.
  • Ownership taken analog board design for Motor driver(3A ) , Testing OCPA , Rdson for high current until delivered production
  • Ownership taken analog board design for LED driver(3A ) Trim for high current & until delivered production
  • TTR 3 sec to 400 ms achieved for ARM controller , TTR 2 sec to 300 ms for Motor driver
  • SAR ADC-6 ch,14 bit, 12bit,16 bit wafer short:
  • Wafer short - Probe card design for Dual site
  • Load board design - common to similar type of probe card & it is interface between tester & probe card(comfortable for all ADC)
  • Wafer- Characterization done for DNL, offset, Gain error, DC test
  • Trim concept to bring up ADC DNL & offset.
  • Final test solution has provide for Dynamic Test - SNR ,THD, ENOB, DNL,INL with on board filter design.
  • OPAMP Device characterization
  • FA bias current OPAMP Amplifier, High voltage differential amplifier devices are characterized Quad site in NI STS.
  • 500V DC Load Board Designed & successfully debugged & released in MT9928 handler
  • Servo Loop Method to verify DC characterization Opamp & Configure done for to test accuracy measurement of Opamp.
  • FA low IP device characterization, Load board design.
  • Power Device (PMIC device)
  • DFT insertion techniques including SCAN, ATPG of system testing/validation
  • Device characterization done in ATE platform Teradyne ETS88, ASL1K.
  • Inno2, Inno3Pro DC- DC Converter , multi-mode QR/CCM Flyback controller , High voltage MoSFET
  • Gage Function Development & integration with Tester.
  • Multi-site test program development & Load board design for Teradnye ETS88.
  • Trimming code development.
  • Repeatability & GRR Done for Inno2 Inno3 device.
  • Perform statistical analysis of yield fallout, debug and fix yield issues; optimize test time
  • 1000 DC Voltage Board design for stress test.
  • CMOS IMAGE SENSORS - FLASH4K,EMERALD
  • The CMOS image sensor is an Area Sensor which has an active pixel of 2K, 4K, 8K, and high frame rate of 1450fps.
  • Involved in the package adapter board design.
  • Involved in the Probe card design.
  • Following image sensor characterization Flash4k,Emerald.
  • DFT debug techniques including SCAN, ATPG, JTAG system testing/validation
  • Device characterization & validate the DC &AC parameters in ATE platform NISTS, Testpod system.
  • SPI Register setting validate as per the customer specification.
  • Redundancy concepts -Independently Developed Test program for defective pixel replacement.
  • Image process library development.
  • Comparatively image analysis to fix the filter setting of Sensor as per the specification and debug the device in various light conditions.
  • FPGA Test program development to capture image data & framing data as per specification in the datasheet.
  • Repeatability & GRR bring up for the sensors.
  • Perform statistical analysis of yield fallout, debug and fix yield issues; optimize test time.
  • Involved in a case study of LVDS Signal Integrity and its degradation at various stages from the DUT (LVDS Driver) to the FPGA located at the far end in the Tesspod ATE and NISTS.

Deputy Engineer

Bharat Electronics Ltd
01.2015 - 10.2018
  • Bench characterization & system level debug
  • ATE Characterization Digital &Analog, mixed-signal Device characterization done in following ATE platform Agilent 93K, Dianosys S790, QMAX (QT2256-640 PXI).
  • FPGA Project: ATE Functional Test characterization for Radar PCB's (approx. 80 Project). Altera & Xilinx FPGA boards functional & timing characterization verification.
  • QA Project: QA Validation & Test program development for the purchase items & In house manufactured Device (CAN Type IC's Validation).
  • Tester Projects: Lab view Tester Development for Functional test & Subsystem test Modules.

Contract Engineer

Bharat Electronics Ltd
08.2012 - 01.2015

Trainee

Bharat Electronics Ltd
12.2011 - 08.2012

Education

Bachelor of Science - Electrical, Electronics And Communications Engineering

PRIST University
Thanjavur , Tamilnadu
05.2006 - 04.2010

Skills

  • Silicon post validation
  • Test Programs Development
  • Digital domain
  • Mixed Signal domain
  • Analog domain
  • ETS88
  • ATE (Schlumberger S790 VXI Universal Tester)
  • NISTS
  • TestPod ATE system
  • ASL1K Tester
  • Qmax(QT2256-640 PXI)
  • LTX
  • HP94k
  • Circuit block spec definition
  • Layout guidelines
  • Load board design
  • Probe card design
  • Visual Basic
  • C
  • C
  • VHDL
  • Test strategy innovation
  • Key Performance Indicators
  • VHDL test bench development
  • Simulation timing analysis
  • FPGA
  • CPLD
  • Xilinx ise
  • Quartus ii
  • Model sim
  • Matlab code
  • DFT debug
  • SCAN
  • ATPG
  • JTAG
  • MBIT

Accomplishments

  • Test time reduction done 15 sec to 6 sec in ETS 88 Tester for inno3 test.
  • Many suggestions to improved test program quality.
  • Production Yield improvement & GRR Verification between test tester & load board for PI projects.
  • Pattern developed three different volt level execution ETS 88 for PMIC IC.
  • High Voltage stack up PCB board has developed.

Timeline

Sr Test Lead

Tessolve Semiconductor
10.2018 - Current

Deputy Engineer

Bharat Electronics Ltd
01.2015 - 10.2018

Contract Engineer

Bharat Electronics Ltd
08.2012 - 01.2015

Trainee

Bharat Electronics Ltd
12.2011 - 08.2012

Bachelor of Science - Electrical, Electronics And Communications Engineering

PRIST University
05.2006 - 04.2010
RAMKUMAR SENTHILNATHAN