Randy Thomas

Converted legacy Cadence flow scripts to new unified Stylus format.

• Prepared original and relevant options for clients suitable to individual requirements.
• Provided ASIC engineering contract services

While on sabbatical from Renesas I developed, prototyped, and verified the robotics and software required for automated capture and publishing of 360° panoramas for use as canvases for augmented and virtual reality. Included Bluetooth support and a sophisticated embedded system.

Project management and ASIC design from RTL to GDS2: Verilog RTL and constraint development and verification, DFT, logic/memory BIST, JTAG, ATPG, formal verification, synthesis/physical synthesis, floor-planning and prototyping (hierarchical and flat,) placement, routing, clock distribution (mesh and CTS,) routing, RC extraction, delay calculation, STA / timing closure, signal integrity, power analysis, DRC/LVS, DFM, package design, ATE interface, and failure analysis for a variety of chip architectures and I/O including DSP, FFT, USB2/3, PCIe, (LP)DDR, ECC, ARM, X-bar.

ASIC design from RTL to GDS2: Verilog (and occasional VHDL) RTL and constraint development and verification, DFT, logic/memory BIST, JTAG, ATPG, formal verification, synthesis/physical synthesis, floor-planning and prototyping (hierarchical and flat,) placement, routing, clock distribution
(mesh and CTS,) routing, RC extraction, delay calculation, STA / timing closure, signal integrity, power analysis, DRC/LVS, DFM, package design, ATE interface, and failure analysis for a variety of chip architectures and I/O including DSP, FFT, USB2/3, PCIe, (LP)DDR, ECC, ARM, X-bar. (NEC Electronics and Renesas Technologies merged April 2010.)

Founding partner and lead hardware and software designer for a start-up that developed an FDA-regulated medical device that provides data acquisition and intelligent decision-making/alarms with automated interface to Electronic Medical Records (EMR).

Cooperative designer with UF/Lockheed Martin Interdisciplinary Product
and Process Design Program. Designed and built prototypes of a Sun S-Bus-to-PCI interface for use with Lockheed Martin's Common-Image Signal Processing (CISP) system. Included printed-circuit board (PCB) design, VHDL creation and FPGA implementation, documentation, manufacturing analysis and prototype creation and system verification.