Reed Cao
Troy
Summary
FPGA Design Engineer with extensive experience in Zynq Ultrascale+ platforms and Vivado software. Proven track record in hardware debugging, Git version control, and collaborative project management.
Overview
10
10
years of professional experience
Work History
FPGA Design Engineer
General Dynamics Land Systems
Sterling Heights
06.2024 - Current
- Implemented and tested MIPI camera to H.264 video stream on KV260 running Ubuntu
- Designed and tested multiple Zynq Ultrascale+ platforms on Atlas SOM, performing various functions such as HDMI, SDI, ethernet, etc.
- Established revision control for Vivado projects in Git, managing numerous projects and repositories with tagged versions and detailed changelogs
- Maintained multiple Ubuntu development environments, supporting seamless development for onsite and remote users
- Architected and verified efficient clock domains for PL use in new and existing designs, ensuring reliable performance
FPGA Design Engineer
Lockheed Martin, MFC
Orlando
05.2020 - 05.2024
- Developed requirements for Mission Control circuit card and Kria SOM to ensure alignment with project specifications
- Owned and created the Internal ViaROM controller, a module that bridges the
system communication interface with Intel’s read-only memory (ROM) IP - Implemented design iterations and bug fixes through GitLab, streamlining version control and collaboration
- Optimized read cycle times from 10+ clock cycles to one clock cycle, allowing for uninterrupted burst reading capabilities
FPGA Design Engineer
Raytheon
Tucson
08.2016 - 04.2020
- Architected FPGA designs for the AD9914 DDS chip and MT25Q flash device on the Exciter Receiver CCA
- Analyzed system level impact of Exciter Receiver FPGA and derived requirements to inform FPGA design
- Responded to FPGA requirements change during proof of manufacturing, re-designing 3 years of design in 2 months to meet project timelines
Education
Bachelor of Science - Electrical Engineering
University of Michigan
Ann Arbor, MI05-2016
Skills
- FPGA design
- Vivado software
- Zynq platforms
- Video integration
- Hardware debugging
- Git version control
- Effective collaboration
Timeline
FPGA Design Engineer
General Dynamics Land Systems
06.2024 - Current
FPGA Design Engineer
Lockheed Martin, MFC
05.2020 - 05.2024
FPGA Design Engineer
Raytheon
08.2016 - 04.2020
Bachelor of Science - Electrical Engineering
University of Michigan