Masters Degree Candidate majoring in Electrical and Computer Engineering with a focus in Digital Systems. Graduating in December 2024 from Santa Clara University. Dependable and hard-working.
Overview
3
3
years of professional experience
Work History
Summer Intern
Albert Chong Associates, Inc.
07.2024 - 09.2024
Assisted with drafting of electrical engineering construction documents using AutoCad
Teaching Assistant
Santa Clara University E.E. Department
01.2024 - 06.2024
Taught and directed labs for Introduction to Logic Design and Electric Circuits I courses
Teaching Assistant
Santa Clara University E.E. Department
09.2023 - 12.2023
Graded homework assignments for Microprocessors and Electric Circuits courses
Customer Service Engineering Intern
Hawaiian Electric Company
06.2023 - 09.2023
Assisted in the planning of electrical infrastructure for the Honolulu Skyline Rail
Collaborated with other engineers to implement Ipad use in order to digitize and streamline the workflow
Summer Intern
Edge Electrical Consulting
08.2022 - 09.2022
Learned how to do load calculations, panel scheduling, arc flash calculations, and drafting
Research Assistant
Santa Clara University E.E. Department
07.2022 - 08.2022
Researched the deployment of tensorflow lite neural networks on STMicro boards using tinyML
Cashier
Foodland Farms
06.2021 - 09.2021
Front end cashier
Education
Masters Degree - Electrical and Computer Engineering
Santa Clara University
Santa Clara, CA
12.2024
Bachelor of Science - Electrical and Computer Engineering
Santa Clara University
Santa Clara, CA
06.2023
Skills
Coding Languages: C, C, ARM Assembly, Verilog
Design Tools: Matlab, LTSpice, NI Multisim, Keil uVision, Github, IAR embedded workbench
Lab Equipment: Oscilloscope, Multimeter
Works well with others
Quick learner
Dependable
Microsoft Office
Projects
C Implementation of Tomasulo’s Algorithm: Implemented Tomasulo’s algorithm on a simple C coded instruction set architecture in order to understand instruction level parallelism and dynamic scheduling.
Intra-system Communication Project: Programmed an STM-G070RB board to communicate packetized data through 4 UART ports to different devices such as a PC, a GPS module, a fiber optic cable, and other STM32 chips.
Verilog SPI interface: Designed a Verilog implementation for an SPI interface and created a test bench in order to prove the validity of the design
Senior Project: “Low Power TinyML for Image Recognition”. Developed an image recognition neural network application to assist the visually impaired and deploying it to a microcontroller
Awards
Santa Clara University School of Engineering, 53rd Annual Senior Design Conference, Design Presentation Award - 1st Place in Session (tied), Low Power TinyML for Image Recognition
Timeline
Summer Intern
Albert Chong Associates, Inc.
07.2024 - 09.2024
Teaching Assistant
Santa Clara University E.E. Department
01.2024 - 06.2024
Teaching Assistant
Santa Clara University E.E. Department
09.2023 - 12.2023
Customer Service Engineering Intern
Hawaiian Electric Company
06.2023 - 09.2023
Summer Intern
Edge Electrical Consulting
08.2022 - 09.2022
Research Assistant
Santa Clara University E.E. Department
07.2022 - 08.2022
Cashier
Foodland Farms
06.2021 - 09.2021
Masters Degree - Electrical and Computer Engineering
Santa Clara University
Bachelor of Science - Electrical and Computer Engineering
Commercial & Residential Real Estate Paralegal at Albert Buzzetti & AssociatesCommercial & Residential Real Estate Paralegal at Albert Buzzetti & Associates