Summary
Overview
Work History
Education
Skills
Websites
Professional Highlights
Volunteer Experience
Timeline
Generic

Divya Singh

Summary

Product leader with 16+ years of experience across strategy, product management and sustainability innovation in the computing industry. As a trailblazing systems lead and innovation change agent at Intel, demonstrated influence at C-level for a cross-company initiative from vision to roadmap and tactical plans for NetZero data centers (DC). Authentic leadership and technical fluency spanning the depth and breadth of DC tech stacks- AI, Data, Analytics, CRM, and hands on subject matter experience in sustainable compute. Inspires leaders, cross functional teams, and global organizations envision business and planetary scale futures at the nexus of AI, energy, & climate.

Overview

17
17
years of professional experience

Work History

Head of Product

Intel
01.2021 - 07.2024
  • Enabled > $B sales pipeline, 5k+ new users directly attributable to advisory tools, strategies, CEO keynote content, quality KPIs in partnership with sales and marketing to shape narrative, messaging and positioning
  • Launched 3 corporate initiatives from vision to execution including annual performance goals, Intel’s Responsible AI Principles incorporating climate impact, and addition of sustainability section to product lifecycle
  • Mobilized, operationalized, and executed a strategic framework for NetZero DCs since orchestrating the formation of Intel’s inaugural product strategy and sustainability office, a virtual team of 50+ fellows, business leaders and championed by Vice President/General Manager
  • Executive alignments with Voice of Customers, market research, and sustainability subject matter expertise resulted in announcement of Intel’s NetZero goals in April’22
  • Engaged and cultivated 4 tier-1 hyperscale accounts targeted on customer NetZero goals in US & PRC and mitigated market share loss at 2 strategic enterprise accounts with sales and business development
  • Incubated new business plan ~200-500M$ annual SaaS revenue opportunity in collaboration with SI & ISV accounts and product leaders leveraging market research on pricing strategies for Xeon fleet services
  • Researched, communicated & developed recommendations for sustainable AI strategy leveraging primary & secondary research on AI systems, energy efficiency, carbon accounting, and circularity.

Sr Tech Program Mgr

Intel
01.2018 - 01.2021
  • Led execution of two new multi-billion$ lines of silicon products with cross-functional engineering leaders for the data center business with streamlined processes
  • Planned and executed turnaround for A-step power-on ready firmware, cloud scale full-stack post-silicon validation plan setting records for the fastest power-on in Xeon execution history with strong technical & product leadership for schedule, feature, and quality tradeoffs
  • Facilitated executive and stakeholder alignment to manage 2 Quarter risk exposure while managing rhythm of business (RoB) with a single pane of glass business process for ~6 Quarters with strong organizational and analytical abilities, and experience in high-level business discussions
  • Partnered with leadership team to organize employee training webinars, achieving ~400+ in average attendance and coordinated business unit OKRs with other TPMs.

Test Chip Program Mgr

Intel
01.2014 - 01.2018
  • Led the definition, planning, and execution of technology-enabling first set of requirements and features of patterning design guide for leading edge transistor process nodes in a cross-functional org of ~50 reporting directly to VP and Intel Fellow
  • Drove quality, and throughput up to fifty times with automated flows to Tape in first testchip design to enable Intel’s innovative 22FFL low power node ~6 weeks ahead of plan, awarded Divisional recognition
  • Promoted Intel’s diversity & sustainability initiatives with team hiring, mentoring of new moms working on process technology at Intel’s Fabrication sites, and blogging on internal sites.

Senior Data Scientist

Intel
01.2008 - 01.2014
  • Researched and integrated lithography process flows in Intel’s 24x7 D1X/D1D fabs with optical models and computational simulations to alleviate barriers to logic scaling for next gen efficiency
  • Deployed Physics-based AI/ML models to reduce defects and improve yields
  • Design of experiments resulted in 1.6X faster imaging throughput, 20% faster tapeout cycle time with 15% more mask layers
  • Pioneered Intel’s Pitch Quartering interconnect process and Optical Phase-shifted lithography process over two generations
  • Integrated trade-secret IPs into production flows
  • Planned and executed new product introductions (NPI) of 3 generations of server and client CPUs.

Education

PhD in Physics -

Johns Hopkins University jointly with National Institute of Standards and Technology (NIST)

BS-MS Engineering Physics (5 yr) -

Indian Institute of Technology-Kanpur (India)

Skills

    Portfolio Strategy

    Portfolio Management

    Product Management

    Product Development

Professional Highlights

  • Enabled > $B sales pipeline on Salesforce platform in computing industry’s most competitive & disruptive markets with sustainability advisor tools, go-to-market (GTM) & sales enabling over 3 yrs.
  • Launched 3 corporate initiatives, 6+ strategic partnerships with Tier-1 accounts to address customer total cost, carbon, and rising energy footprints with Intel’s inaugural Product Sustainability office.
  • Delivered concept to industry standard execution turnaround for two new multi-billion$ lines of computing products, multi-million$ record-leading Testchip Tape in on a new process node and 20% faster cycle time on a new transistor process with globally distributed & matrixed teams of 50-500+.

Volunteer Experience

  • Tracked developments and volunteered subject matter expertise in industry, academic consortiums such as MIT-led PAIA WG, Open Compute Project sustainability WG, carbon neutral data center pack (CNDCP), Fin/GreenOps for evolution of industry standards and practices on energy efficiency and carbon accounting.
  • Judging and mentoring roles in Intel AI Global Impact festival for AI innovation by next-gen innovators (2022-2024).
  • Organized annual Earth Day events at Intel campuses and conference planner and champion for Fab(-ulous) women at Women at Intel Network (WIN) conferences (multiple years).
  • Organized community events, recruited volunteers, fund-raised as President and Project Coordinator of Portland chapter of Association for India’s development (AID) a 501(c) (3) non-profit implementing sustainable development goals in India (2008-2020).

Timeline

Head of Product

Intel
01.2021 - 07.2024

Sr Tech Program Mgr

Intel
01.2018 - 01.2021

Test Chip Program Mgr

Intel
01.2014 - 01.2018

Senior Data Scientist

Intel
01.2008 - 01.2014

PhD in Physics -

Johns Hopkins University jointly with National Institute of Standards and Technology (NIST)

BS-MS Engineering Physics (5 yr) -

Indian Institute of Technology-Kanpur (India)
Divya Singh