Summary
Overview
Work History
Education
Skills
Timeline
Generic

VALERIY ZYALENKA

Apex,NC

Summary

More than thirty years of experience in electronic circuit Object-oriented and Procedural software design methodologies with involvement in all phases of Software Development Life Cycle (SDLC). Expert knowledge of semiconductor physics, circuit theory, analog and digital RF schematic, SPICE modeling algorithms, numerical methods, manufacturing processes, MOS, LDMOS and GaN device models used in EDA tools. More than 10 years of experience in RF device modeling and power amplifier design for CIFR applications. Proficient with GaN-SiC ASM HEMT die model development to analyze and verify influence of critical technology parameters on die performance in RF applications. Extensive experience in die model parameters tuning and optimization to bench measurement data, including Active and Passive Load Pull, and to TCAD simulation data. Expert knowledge of Keysight PathWave (ADS) and Cadence AWR Microwave Office architecture, numerical methods, and API to develop and deliver Process Design Kits to customers. Linearity Modeling and Simulation of IMD, ACPR, EVM, and Load Pull. Proficient in development of GUI based EDA tools with Schematic and Layout options. Team and target orientated, self-motivated with strong analytical, problem-solving, and communication skills.

Overview

23
23
years of professional experience

Work History

Senior Research Associate

Belarus State University
01.2001
  • Development of algorithms, electronic circuit’s device models, numerical methods; implementation, coding and maintenance of SPICE-like simulator MARS for the regular and high dose of radiation working conditions
  • Development of algorithms, hardware device models, numerical methods of the heat transfer / exchange processes in the satellite electronic equipment, optical and main component units; implementation, coding and maintenance of simulator HEATEXCHANGE
  • Collaboration with customer hardware designer teams to verify models and software interfaces.

Senior Modeling Specialist / Software Development Engineer

Wolfspeed / CREE Inc
06.2018 - 08.2023
  • Member of RF R&D Technology team followed all company policies and procedures to design and deliver quality products to customers
  • ASM HEMT GaN die model development, parameters tuning and optimization to analyze, verify, and predict the influence of critical technology parameters on device performance
  • Development, implementation, and testing of extended trap models for different technology splits, die model updates to verify linearity performance in RF circuit and system level IM3, ACPR, and EVM simulations
  • Communicated and collaborated with in-house measurement and CIFR product development team members, evaluated measurement data using JMP software
  • Worked with technology, testing, and measurement team members to help develop robust solutions to meet customer requirements for functionality, stability, and performance
  • Demonstrated and discussed developed die model performance in circuit level simulation with focus team members
  • Coded developed model versions and created PDKs for the Keysight PathWave (ADS) and Cadence AWR environments
  • Regularly released PDK updates to internal circuit design team to benchmark a new product performance to customer specifications
  • Run Silvaco TCAD simulations of 2D die structures and developed scripts for IV / CV

Senior Modeling Specialist / Software Development Engineer

Infineon Technologies Americas Corp
01.2012 - 05.2018
  • Regularly attended SAS (JMP), Cadence (AWR), Keysight (PathWave), and Silvaco (TCAD) trainings, webinars, and presentations to improve skills in data processing, RF circuit and system level design and simulations
  • Utilized knowledge of C++ STL/C, AEL, Verilog-A, Microsoft Visual Studio, and Windows OS
  • Member of Modeling team followed all company policies and procedures to deliver quality products to customers
  • Development of wide range manufactured LDMOS and GaN die, package, passive component, and bond wire models for RF power transistors
  • Evaluation of IV, CV, Active and Passive Load Pull measurement data for model parameters tuning, optimization, and verification
  • Development and release of electronic component PDKs for internal product design teams
  • Development and yearly releases of manufactured product PDKs to customers for both Keysight ADS and AWR Microwave Office tools
  • Lead of RF Device Designer (RFDD) development team with full scale ownership scope, including tool architecture, GUI, layout, and database infrastructure choices, algorithms and numerical methods
  • RFDD allows design engineers virtually create RF power transistors by placing components into the package, automatically generate all relevant P-Cells and wire models, and send it to AWR or ADS to provide circuit level simulations
  • RFDD bonder interface block allows to create and send program to production bonder machine to build device samples
  • Mentored and trained team members, conducted tool testing and performance evaluation
  • Created and delivered user manuals and documentation to internal design engineers, operators, and external customers
  • Attended Keysight, AWR, and SAS JMP training programs to deepen professional skills
  • Utilized knowledge of C++ STL/C, API, AEL, Verilog-A, Microsoft Visual Studio, and Windows OS.

Senior Software Engineer

Silvaco Inc
05.2002 - 12.2011
  • Lead of SmartSpiceRF development team with end-to-end ownership scope, including software architecture and database infrastructure choices, algorithms, numerical methods
  • Coding and implementation of device models for the Steady-State large-signal analyses by the frequency-domain Harmonic Balance and time-domain Shooting methods
  • Development, coding, and implementation of the modules to perform complete set of small-signal analyses and characterization capabilities, including Periodic stability analysis, Transient noise and Phase noise analyses with full parametric sweep and Monte-Carlo analysis
  • Development, coding, and implementation of digitally modulated sources (BPSK, QPSK, QAM, 16-QAM, GMSK, OFDM, etc.) library for the mixed time-frequency domain Envelope analysis
  • Mentored and trained team members
  • Utilized knowledge of C++ STL/C, CVS, GNU make, UNIX and Microsoft Windows OS.

Software Engineer

Silvaco Data Systems Europe Ltd
01.2001 - 05.2002
  • Member of analog circuit simulator SmartSpice development team
  • Development, coding, implementation, and maintenance of the time-domain SDE based non-Monte Carlo algorithm of noise simulation in nonlinear driven circuits
  • Development and implementation of the time-domain noise models for the active and passive devices
  • Collaborated with team members to solve complex problems, improve quality and performance of software tool to meet customer demand
  • Utilized knowledge of C++ STL/C, CVS, GNU make, UNIX and Microsoft Windows OS.

Education

Master of Science - Electronics Engineering and Computer Science

Belarus State University

Diploma -

Skills

  • Quality Assurance
  • Root Cause Analysis
  • Project Planning
  • Data Analysis
  • Customer Relations
  • Proficient in
  • C/C, Microsoft Visual Studio, Verilog-A
  • Expert in Keysight PathWave (ADS), Cadence AWR Microwave Office

Timeline

Senior Modeling Specialist / Software Development Engineer

Wolfspeed / CREE Inc
06.2018 - 08.2023

Senior Modeling Specialist / Software Development Engineer

Infineon Technologies Americas Corp
01.2012 - 05.2018

Senior Software Engineer

Silvaco Inc
05.2002 - 12.2011

Senior Research Associate

Belarus State University
01.2001

Software Engineer

Silvaco Data Systems Europe Ltd
01.2001 - 05.2002

Master of Science - Electronics Engineering and Computer Science

Belarus State University

Diploma -

Similar Profiles

CREATE PROFILE
VALERIY ZYALENKA