Summary
Overview
Work History
Education
Skills
Timeline
Generic
Open To Work

Vatsalya Ahire

Silicon Design Engineer
Fort Collins,CO

Summary

Accomplished FPGA Design, RTL, and Design Verification Engineer with over three years of industry experience. Demonstrated success in delivering innovative solutions that enhance performance and reliability while meeting stringent project deadlines. A commitment to continuous improvement and staying current with emerging technologies drives the pursuit of excellence in every project.

Overview

3
3
years of professional experience

Work History

Design Verification Engineer

Advanced Micro Devices
03.2025 - 08.2025
  • Developed and maintained UVM-based verification environments for PCIe and CXL.
  • Designed reusable UVM components (drivers, monitors, sequences) to support scalable testbenches.
  • Led functional verification of QDMA subsystem designs with integrated LPDDR/DDR5 memory interfaces; developed test scenarios to validate DDR5 initialization training, and calibration sequences.
  • Performed hardware bring-up/debug to ensure signal integrity and timing compliance.
  • Performed functional/code coverage analysis, contributed to coverage closure, and created SystemVerilog Assertions.
  • Debugged simulations using VCS/QuestaSim, waveform viewers, and automated regressions with Python/TCL.
  • Integrated new tests into CI regression suites and contributed to STA-aware test coverage planning.

FPGA & Embedded Engineer

Komatsu
08.2023 - 11.2024
  • Verified FPGA-based vehicle control systems with Verilog and UVM.
  • Developed RTL for CAN communication, joystick interfacing, and signal routing on Xilinx FPGAs.
  • Developed and executed verification procedures for FPGA control logic with dSPACE HiL platforms, including analog sensor interfacing, power rail monitoring, and PMIC sequencing; contributed to validating reliable power management and safety-critical operation under ISO 26262 practices.
  • Used Vivado for synthesis, constraint management, STA review, and FPGA debug.
  • Created MATLAB/Simulink-based control models and validated in dSPACE HIL.
  • Developed Python/TCL automation scripts for build, regression, and waveform-based analysis.

Embedded Software & Controls Engineer(Co-op)

Harsco Rail
08.2021 - 07.2022
  • Designed FPGA-based signal processing systems in VHDL using Xilinx SOCs.
  • Created UVM testbenches with assertions and functional coverage models for railway safety systems.
  • Integrated system-level tests using MATLAB/Simulink and closed-loop verification.
  • Verified CAN/I2C/SPI communication at block and system level.
  • Familiarity with MIL-STD-1553 interface requirements and protocol behavior.
  • Developed GUIs and automation routines for operator-in-loop validation.

Intern

Alert Innovation
09.2020 - 02.2021
  • Assisted in developing FPGA RTL blocks in VHDL/Verilog for robotic motion pipelines, gaining exposure to digital design workflows.
  • Supported UVM-based simulation and verification under guidance of senior engineers.
  • Learned to integrate FPGA firmware with embedded platforms (Beaglebone, Raspberry Pi) and tested simple modules.
  • Contributed to sensor driver bring-up (I2C) and performed basic system-level debug with oscilloscopes and logic analyzers.
  • Shadowed engineers in integrating DDR/PCIe interface IP into FPGA modules, observing design-to-verification workflows.

Education

M.S. - Electrical & Computer Engineering

Colorado State University
Fort Collins, CO
05.2024

B.E. - Electronics & Telecommunication Engineering

Ramrao Adik Institute of Technology (RAIT)
Navi Mumbai, India
06.2022

Skills

  • RTL design expertise
  • Power-aware verification
  • Scripting languages proficiency
  • Coverage-driven verification
  • UVM framework expertise
  • Proficient in SystemVerilog
  • Assertion-based verification
  • Analytical synthesis and STA expertise
  • Effective team engagement
  • Clear and concise communication
  • Effective team cohesion
  • Prioritization and scheduling

Timeline

Design Verification Engineer

Advanced Micro Devices
03.2025 - 08.2025

FPGA & Embedded Engineer

Komatsu
08.2023 - 11.2024

Embedded Software & Controls Engineer(Co-op)

Harsco Rail
08.2021 - 07.2022

Intern

Alert Innovation
09.2020 - 02.2021

M.S. - Electrical & Computer Engineering

Colorado State University

B.E. - Electronics & Telecommunication Engineering

Ramrao Adik Institute of Technology (RAIT)

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