Summary
Overview
Work History
Education
Skills
Timeline
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WAYNE PORTER

Pocatello,ID

Summary

A innovative integrated circuit designer with appreciation for the intricacies of IC design and development, and experience in wireless, analog, and mixed signal design. Team leader/player with strong problem-solving skills to contribute effectively to projects and teams.

Overview

25
25
years of professional experience

Work History

Senior Principal Design Engineer

On Semiconductor
04.2018 - Current
  • New product ASIC, analog and mixed-signal IP, and Inductive Position Sensing ASSP development in 180nm CMOS and 65nm BiCMOS processes technologies
  • Designs included multi-path nested miller chopper stabilized amplifier, ADC front end switch capacitor amplifier, 32kHz reference rate PLL with -50C to 150C temperature range, 4MHz excitation coil oscillator, crystal oscillator, analog front end inductive position sensor receiver, and new low-power inductive position sensor definition / design feasibility
  • Also worked on top level verification, lab validation, and test support
  • Participated in local and corporate level organization methodology teams
  • Responsibilities include Definition, Requirements, Architecture, Planning, Design, Verification, Validation, Quality, common best practices / methodology, training / mentoring, and team leadership
  • Products: NCS32100 (ASSP), internal IP, proprietary ASICs, and others in development.

Senior Design Engineer

Linear Technology / Analog Devices
01.2004 - 01.2018
  • New standard product development in internal 0.6um BiCMOS and TSMC 180nm BiCMOS processes
  • Designs included voltage reference, DAC, EEPROM, amplifier, I2C, SPI, IO, regulator/LDO, charge pump, current sense amplifier, silicon oscillator, and all-digital PLL
  • Improved several other designs including delta-sigma ADC
  • Responsibilities included data sheet, design, layout supervision, evaluation, debug, test support, quality support, and project management
  • Products: LTC2970, LTC2974, LTC2978, LTC2975, LTC2971, and others in development.

Senior Staff Design Engineer

Global Communication
01.2002 - 01.2004
  • Devices (GCD) / Bermai
  • Single chip direct conversion 802.11 transceiver local oscillator, as well as PLL research and development in 250nm CMOS process technology
  • Designs included low noise 1.6GHz and 3.2GHz CMOS integrated LC tank VCO and high performance PLL synthesizers with automatic frequency calibration for direct conversion WiFi transceiver
  • Integer-N 1.2GHz, 1.6GHz, and 2.4GHz PLLs
  • Responsibilities included architecture, design, and lab evaluation.

Staff Design Engineer / Section Lead

LSI Logic
01.1999 - 01.2002
  • IO and mixed signal IP development in 0.6CMOS, 180nm CMOS, and 120nm CMOS process technologies
  • Designs included SCSI transceivers, 5V tolerant IO, and edge-rate controlled IO functions, wide-band VGA and MRAC compensation circuits for Read Channel AFE
  • Responsibilities included new product development and mixed signal design, customer and strategic partner interface, new project feasibility studies, leadership, training and mentoring, performance evaluations, and department design methodology
  • Products/Projects: ULTRA320 SCSI IP, ATA IO IP, ULTRA640 SCSI IP, 5V Tolerant IO IP

Intermediate Design Engineer

National Semiconductor
  • Low power wireless frequency synthesis, clock generation, and wired IO transceiver standard products in 0.6um CMOS and 0.8um high-speed BiCMOS process technologies
  • Designs included bus transceivers, clock generation PLLs, single and dual high-performance integer PLL synthesizers, fractional N PLLs including National’s first delta sigma fractional N PLL, and crystal oscillator
  • Responsibilities included analog and mixed signal design, evaluation, and test support
  • Products: Bus Transceivers & IO, CGS602, CGS605, LMX1600, LMX2326, LMX2470

Education

MBA - Innovation Management

University of Colorado At Colorado Springs
Colorado Springs, CO
12.2011

Master of Science - Electrical Engineering

National Technological University
Minneapolis, MN
02.1999

Bachelor of Science - Electrical Engineering, Computer Emphasis

Brigham Young University
Provo, UT
08.1993

Skills

  • Tools
  • IC Design:
  • Cadence Virtuoso, Spectre, SpectreSVerilog, SpectreHDL, SpectreRF, AMS, Ocean/Skill, Mentor tools (AFS, Symphony, Schematic Capture), Verilog-A, Verilog-AMS, SystemVerilog, Layout, Cohesion (LTCSim), HSPICE, LTspice, Ultrasim/Nanosim, Verilog2001, Saber, Mast, SaberScope/AIM, Awaves
  • Programming and Math:
  • C, C#, Perl, VBA/Excel, MATLAB/SciLab/Octave, MathCad, Python, wxMaxima, MathCad
  • PCB Board:
  • KiCad, Eagle, Pads
  • Lab equipment:
  • Oscilloscopes, Logic Analyzers, Signal Generators, Frequency Counters, Multimeters, Spectrum Analyzers, etc
  • OS, Office:
  • Unix / Linux / Windows; Microsoft and Libre office tools - excel, calc, writer, word, power point, impress
  • Project Management and Requirements:
  • Microsoft Project, Jira, Confluence, Jama

Timeline

Senior Principal Design Engineer

On Semiconductor
04.2018 - Current

Senior Design Engineer

Linear Technology / Analog Devices
01.2004 - 01.2018

Senior Staff Design Engineer

Global Communication
01.2002 - 01.2004

Staff Design Engineer / Section Lead

LSI Logic
01.1999 - 01.2002

Intermediate Design Engineer

National Semiconductor

MBA - Innovation Management

University of Colorado At Colorado Springs

Master of Science - Electrical Engineering

National Technological University

Bachelor of Science - Electrical Engineering, Computer Emphasis

Brigham Young University

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