Dynamic Digital Verification Intern at JuChen Semiconductor Inc. with a solid foundation in ASIC verification and proficiency in Verilog. Demonstrated problem-solving abilities and effective teamwork while enhancing module functionality through rigorous testing. Quick learner adept at navigating Linux environments, contributing to successful verification flows and improving communication protocol understanding.
Smart Surveillance System using YOLOv8 and Raspberry Pi 5
Tools: Python, OpenCV, YOLOv8, FSM logic, GPIO, Flask
Description:Developed a cost-effective dual-camera surveillance system with object and motion detection using YOLOv8. Integrated face/person recognition, distance estimation, and buzzer alarms with Raspberry Pi GPIO.Built a web interface for live video feed and remote monitoring.
Tools: Verilog, Synopsys Design Compiler
Description: Designed a finite state machine (FSM) to control coin input, vending logic, and change output. Simulated functionality and synthesized the circuit using industry-standard flow.
No formal certifications yet, currently pursuing Coursera-based FPGA and Verilog courses to strengthen practical skills.