Yashaswini Pendyala

Recent Electrical Engineering graduate from Colorado State University with specialized training in ASIC/VLSI design and FPGA development. Equipped with a solid foundation in circuit design and hands-on project experience, seeking a challenging role to apply technical knowledge and contribute to innovative engineering solutions

• Hardware Description Skills: RTL Design & Implementation, Static Timing Analysis, I2C, UART, Circuit Design and Analysis, IoT
• Programming Languages: Verilog, VHDL, System Verilog, Python, C, C++, MATLAB, Embedded C, Assembly Language
• Electronic Design Automation Tools: Cadence Virtuoso, Cadence ASSURA, Altera Quartus Prime, Xilinx Vivado
• Soft Skills: Strong communication, Teamwork, Problem Solving, Critical thinking, Time management, Task prioritization, Creative thinking

Finite State Machine - Traffic Light Signal Controller    

•  Designed and implemented a traffic light control system for a three-way intersection  using a six-step state machine design process.  

• Utilized T flip-flops and combinational logic, ensuring synchronized operation and validated functionality through testbench simulations.

3-Bit ALU Design 

• Developed a hierarchical 3-bit ALU implementing operations such as addition, subtraction, multiplication, and left shift.
• Validated functionality through Cadence-based simulation and waveform analysis, confirming robust performance across diverse test cases.

8-Bit Synchronous counter  

• Design Designed an 8-bit synchronous counter with a 1MHz minimum clock rate and 1pF load capacitance, featuring active-low set/reset and active-high parallel load.
• Conducted DRC and LVS checks to ensure design integrity, collaborating on schematic and layout design.

High-Precision, Programmable Gain, Multi-Stage, Switched Capacitor Amplifier 

• Designed a 3-stage pipelined amplifier with programmable gains, achieving 1V output swing.
• Achieved high precision and stability with a 1MHz input signal frequency and 10MHz clock rate, verified through total harmonic distortion measurements.

• FPGA Design for Embedded Systems Specialization, University of Colorado Boulder (coursera), Mastered FPGA design, including Verilog, VHDL, and RTL design. Completed a capstone project focusing on a configurable softcore processor system, emphasizing practical FPGA development skills.
• Introduction and Programming with IoT, Pohang University of Science and Technology (coursera), Acquired specialized knowledge and practical skills in IoT technologies, focusing on architecture and applications.