Summary
Overview
Work History
Education
Skills
Websites
Timeline
Generic

AYUSH KRISHNA

Austin,Texas

Summary

Having solid experience in physical design engineering. Skilled in IC design, layout optimization, and timing analysis. Strong focus on team collaboration and achieving results. Known for flexibility and reliability in dynamic environments.

Overview

4
4
years of professional experience

Work History

Physical Design Engineer

Cirrus Logic
02.2023 - Current
  • Collaborated with cross-functional teams to ensure design specifications met project requirements.
  • Conducted various checks to verify compliance with physical design standards.
  • Supported the development of floorplan and routing strategies to optimized area power and timing.
  • Engaged in continuous learning of new tools and methodologies relevant to physical design engineering.
  • Developed custom scripts to improve design flow efficiency, boosting productivity within the team.
  • Conducted Static timing analysis to ensure timing closure with zero violations for complex digital designs.

Physical Design Intern

Cirrus Logic Inc.
05.2022 - 08.2022
  • Owned block level design on 22nm technology
  • Learned about the synthesis commands & flow to perform Logical Synthesis through Design Compiler
  • Analyzed clock structure by using Verdi and defined clock constraints at places of interest
  • Debugged errors related to DC flow and worked cross team with RTL designers in order to solve issues

Education

Master of Science - Electrical Engineering

Texas A&M University
College Station, Texas
12.2022

Bachelor of Technology - Electrical Engineering

National Institute of Technology
Kurukshetra
06.2020

Skills

  • Knowledge of Logic Synthesis Flow, Physical design flow, Routing, Placement, Static Timing Analysis, Clock Tree Synthesis, Low Power Design Techniques, Design Rule Checks (DRC), Layout v/s Schematic (LVS)
  • Programming languages: Python, Verilog, C, TCL
  • Tools: Synopsys (Design Compiler, Prime Time, Verdi) Cadence (Virtuoso, Spectre, Conformal), Xilinx Vivado

Timeline

Physical Design Engineer

Cirrus Logic
02.2023 - Current

Physical Design Intern

Cirrus Logic Inc.
05.2022 - 08.2022

Master of Science - Electrical Engineering

Texas A&M University

Bachelor of Technology - Electrical Engineering

National Institute of Technology