Christopher Adams
El Segundo,CA
Summary
Experienced FPGA Engineer with a specialization in FPGA-based systems for satellite communications, combining deep technical expertise with leadership in design and team collaboration. Skilled in architecting high-reliability digital solutions using VHDL, with a strong command of waveform design and DSP algorithms formal verification of space-grade processors. Proven track record of guiding cross-functional teams, mentoring junior engineers, and driving projects from concept through deployment. Adept at integrating hardware with RF and embedded systems, optimizing for test, performance and mission-critical requirements. Strong eagerness to grow and stretch the boundaries of innovation with new technology.
Overview
8
8
years of professional experience
Work History
Senior Principal FPGA Engineer
Northrop Grumman
08.2019 - Current
- Milsatcom testsets hardware design lead
- Hardware and FPGA design lead/architect for a real-time terminal emulator used to demo capabilities and formally verify deliverable hardware.
- VHDL-based FPGA design for high-speed satellite ground communications systems using Vivado.
- FIR filter design, phase-rotation, carrier recovery, automatic gain control, frequency hopping, synchronization timing algothim design, among other DSP algorithms.
- MATLAB development of DSP algorithms and replication in HDL.
- MATLAB EVM analysis for formal verification of flight hardware.
- FPGA implementation of various IP interfaces such as Ethernet, SGMII, Aurora, AXI4.
- XDC constraint creation and timing analysis.
- Hardware debugging with Vivado Lab Tools JTAG debugger.
- VHDL-based testbench creation and pre/post synthesis simulation in Questa Simulator.
- Implementation and test on Xilinx Zynq RFSoC FPGA's using Vitis.
- C++ software development for real-time configuration of hardware on Xilinx Zynq RFSoC FPGA's.
- TCL based FPGA and software build automation. One command, systematic approach to build with shared code and appropriate version control.
- Plan out live demos of payload processor capabilities to the customer in early stages of development. Operate hardware and speak live in front of the customer.
- Development of hardware automation scripts for formal verification using Python and TCL.
- Detailed communication across different teams (SEs, Flight SW, Flight HW) to work towards the success of the program.
- Work closely with system engineers to mature requirements and plans for formal verification.
- Lead daily development standup within hardware team and weekly development meetings with JIRA/Confluence.
- Deep understanding of waveforms on programs that were worked on.
- LMK/LMX clock configuration and optimization.
- New hire mentoring and development
- Intern coordinator for the business unit (100+ interns) in 2025
Orfalea College of Business Lab Technician
Cal Poly
06.2017 - 06.2019
Electrical Engineering Intern
General Atomics
06.2018 - 08.2018
Education
Bachelor of Science - Electrical Engineering
California Polytechnic State University
01.2019
Skills
- Vivado/Vitis
- VHDL
- QuestSim
- Python
- MATLAB
- TCL
- Basic C/C
- Microsoft Office (Excel/Word/Visio)
- JIRA, Bitbucket, Confluence
- Oscilloscope, Spectrum Analyzer, PNAX
- Training and mentoring
- Top Secret Clearance
Timeline
Senior Principal FPGA Engineer
Northrop Grumman
08.2019 - Current
Electrical Engineering Intern
General Atomics
06.2018 - 08.2018
Orfalea College of Business Lab Technician
Cal Poly
06.2017 - 06.2019
Bachelor of Science - Electrical Engineering
California Polytechnic State University
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