Franklin Wang
Folsom,CA
Summary
Results-oriented achiever with the drive to exceed targets and drive success in fast-changing environments. Strategic thinker who can deliver unique solutions and is determined to drive the most cost effective solutions that can meet a projects timelines.
Overview
27
27
years of professional experience
Work History
Senior Strategic Competitive Product Planning Manager
Intel Corporation
01.2015 - Current
- Leads a team to develop an overview of the current competitive landscape and provide insights on their existing and future products, targeted segments, The landscape includes, competitive product reports, including architecture differences, performance measurements & future projections, die size and costs, as well as forward looking roadmaps
- Built training materials to educate the field and internal executive team on how to respond to competitive strengths and weaknesses, as well as help educate and drive product definition decisions for future products to enable leadership products
- Regular report out to over 500+ key stakeholders on the competitive landscape
- Key focus on non-x86 based competition for Client.
Senior Strategic Planner for Intel Tablet Chipsets
Intel Corporation
01.2009 - 01.2015
- Responsible for definition and planning for Intel x86 based Tablet chipsets, starting with Clovertrail (Z2760) in 2008, Baytrail (Z3680), and finally Cherrytrail (Atom x5 Z8350)
- Drove platform usage requirements (features/Performance) for integrated graphics (which includes MSFT WHQL requirements), display, media, audio, and part of I/O.
Diamondville (ATOM SoC Platform) Platform POP (Product Overview Proposal) Team Lead
Intel Corporation
01.2006 - 01.2008
- Lead execution from POP L2 (Value proposition, market opportunity, product landing Zone), to POP L3 (Stakeholder, and engineering/Validation & resource schedule commit) closure
- Drove the team to keep the platform within cost targets, as well as identified key cost reductions in VREG, and heatsink optimizations
- Drove commitments, from engineering, validation, software, to ensure product remained on schedule
- Met with Microsoft engineers and drove Nettop requirements for Windows 7 basic.
Chipset Micro-architect
Intel Corporation
01.2001 - 01.2006
- Working with the principal architects and design engineering group, to write and publish the architecture component specification documentation for Intel’s 865G, 945G, and the 965G Chipsets
- Co-chaired the Change Control Board to ensure the 965G (Broadwater) chip stayed on schedule and managed all change requests
- Drove sku requirements with marketing and engineering to define a fuse table to allow for different product marketing skus.
Platform Application Engineer
Intel Corporation
01.1998 - 01.2001
- Worked on enabling and marketing Intel’s first integrated graphics chipset Whitney (i810), and the follow on chipsets i810E, i815, i845G
- Work involved visiting customers in the US, and Asia Pacific, and Japan to introduce the new chipset platform, and help enable the field with design win’s by being the technical chipset expert from the factory
- Provided key feedback from external customers on what features, and performance requirement and drove those to engineering for future chipsets
- Worked with customers on motherboard layout reviews, as well as writing the technical documentation for the chipsets, both the datasheets, as well as the design guide
- Worked with key ISV/OEM’s to help bring up and debug their motherboards.
Education
MBA - Graduate School of Management
University of California, Davis
BS - Electrical and Electronic Engineering
California State University, Sacramento
Skills
- Project Management
- Competitive Analysis
- Data-Driven Decision-making
- Team collaboration
- MS Project
- Excel
- Word
- PowerPoint
Platforms
- Windows
- MacOS
- IOS
- Android
- Chrome
Timeline
Senior Strategic Competitive Product Planning Manager
Intel Corporation
01.2015 - Current
Senior Strategic Planner for Intel Tablet Chipsets
Intel Corporation
01.2009 - 01.2015
Diamondville (ATOM SoC Platform) Platform POP (Product Overview Proposal) Team Lead
Intel Corporation
01.2006 - 01.2008
Chipset Micro-architect
Intel Corporation
01.2001 - 01.2006
Platform Application Engineer
Intel Corporation
01.1998 - 01.2001
BS - Electrical and Electronic Engineering
California State University, Sacramento
MBA - Graduate School of Management
University of California, Davis
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