Geetha Reddy
Tigard,OR
Summary
Senior Software Development Engineer with expertise in architecting, designing, and implementing high-performing software applications. Proficient in multiple programming languages, software development methodologies, and project management practices. Adept at leading cross-functional teams to achieve project goals and consistently delivering successful projects that enhance system efficiency and user satisfaction.
Overview
39
39
years of professional experience
Work History
Senior Software Development Engineer
Mentor Graphics
Wilsonville, OR
04.1996 - Current
- Responsible for collecting requirements for future User Interface (UI) components
- Advocated the development of a single source code development on NT & UNIX platforms
- Designed and developed Selection Manager Library on NT and UNIX
- Architected and developed Schematic Window (SW)library using TcL/Tk on NT/UNIX. Schematic window library is used by many Mentor Graphics tools in their User Interfaces
- Worked closely with several Mentor Graphics product groups to integrate Schematic Window & Selection manager libraries into their products
- Developed graphics layer package in JAVA for Schematic display
- Implemented the Schematic input Parser in JAVACC
Senior Development Engineer (Synthesis UIG)
Mentor Graphics
Wilsonville, OR
08.1994 - 04.1996
- Developed the UI prototype to prove its viability and was successful in convincing the management to support new UI for Autologic II
- Designed and developed a new UI for Autologic II using Teleuse GUI development tool
- Designed and implemented a Netlist heirarchy browser window for Autologic
- Responsible for the interface between UI and Synthesis kernel.
- Designed and implemented a reader and writer for Genie Schematic format
Senior Development Engineer (RTL Synthesis Tool)
Mentor Graphics
Wilsonville, OR
02.1993 - 08.1994
- Designed and developed code for incremental VHDL synthesis
- Developed the algorithms for constraining subprograms
- Developed and maintained the algorithms to handle block statements in VHDL synthesis
- In-charge of netlisting the synthesis data structures into a format used by downstream optimization tools
- Addressed the defects found in the product in terms of providing quick turn around and permanent code patch
Development Engineer (Library Translation Tools)
Mentor Graphics
Wilsonville, OR
01.1991 - 02.1993
- Developed translational tools for extracting Autologic (Gate level optimization tool) libraries from simulation libraries
- Designed and developed for linearizing complex timing equations into Autologic linear timing model
- Designed and developed the timing interface for Autologic, which converts compiled timing information from simulation C++ classes to a format which Autologic could use more efficiently
- Developed the synthesis logic extractor tool which converts various inputs of Mentor logic modeling into a format used by Autologic
- In-charge of all engineering and official release of builds on different platforms
- Worked with quality assurance group to set up an infrastructure for testing a library translation tool
- Worked with library development group members to get their libraries converted successfully
Software Engineer (Gate Level Optimization Tool)
Mentor Graphics
Wilsonville, OR
07.1989 - 01.1991
- Integrated the Gate level optimization tool into the mentor environment
- Developed timing analysis for combinational logic using Mentor timing mode
Software Engineer
Trimeter Technologies Corp.
Pittsburgh, PA
09.1988 - 07.1989
- Developed the Netlist pattern matching algorithm for rule-based optimization
- Developed the rule evaluation routines for logic optimization
- Developed the interface engine for an expert system used in logical optimization
Software Engineer
OMC Computers
Secunderabad, India
09.1985 - 11.1986
- Developed a seismic analysis package for the Oil & Natural Gas Commission
Education
Master of Science - Computer Engineering
Wayne State University
Detroit, MI08-1988
Bachelor of Science - Electrical Engineering
JNTU
India09-1985
Skills
- Fluent in C, C, Java, TcL/Tk, Genie
Accomplishments
- 1995 Chairman's Achievement Award, Mentor Graphics
- 1987-88 Graduate Professional Scholarship, WSY, Detroit, MI
- 1987 nternational Student Award, WSU, Detroit, MI
- 1981 State Merit Scholarship
- 1979 National Merit Scholarship, Govt. of India
Timeline
Senior Software Development Engineer
Mentor Graphics
04.1996 - Current
Senior Development Engineer (Synthesis UIG)
Mentor Graphics
08.1994 - 04.1996
Senior Development Engineer (RTL Synthesis Tool)
Mentor Graphics
02.1993 - 08.1994
Development Engineer (Library Translation Tools)
Mentor Graphics
01.1991 - 02.1993
Software Engineer (Gate Level Optimization Tool)
Mentor Graphics
07.1989 - 01.1991
Software Engineer
Trimeter Technologies Corp.
09.1988 - 07.1989
Software Engineer
OMC Computers
09.1985 - 11.1986
Master of Science - Computer Engineering
Wayne State University
Bachelor of Science - Electrical Engineering
JNTU
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