Summary
Overview
Work History
Education
Skills
Projects
Awards
Workauthorization
Timeline
Generic

Gouthami Channakeshavamurthy

Hillsboro,OR

Summary

Experienced System Software Validation Engineer with a strong focus on power management and domain ownership. Proven success in leading complex projects from initial boot to customer delivery, with expertise in validation, debugging, and cross-functional collaboration.

Overview

8
8
years of professional experience

Work History

System Software Validation Engineer

Intel
07.2021 - Current
  • UWorking on Next-Gen Intel Client Chip Validation as PM Domain Owner on both Server & Client platform programs, debugging issues in OSPM flows, driver RTD3 flows, Idle and low power states with good understanding of SW, FW, HW, and Intel SoC architecture, MCA, cache coherency and Industry Standard protocols (IDI/MESI), interactions of multiple IPs in uncore to accomplish coherency
  • setting up validation framework/strategy for PowerManagement domain and Working as PowerOn lead for ARL program leading all stages of Post silicon validation starting from PowerON through all HW and SW milestones.
  • Understanding debug tools and engineering them (telemetry through SOCwatch) to enable maximum coverage for the IP Validation.
  • adopting changes on platform software stack (BIOS/ FW/DEBUG TOOLS) on a daily basis through functional/DPMO/DPMT/CVT/CSLP/CCE BKC execution and execute PM test cases and look for potential silicon functional bugs.
  • Worked on pre-si Validation for NVL (Simics) - Accelerated shift-left in validation by enabling key Hardware flows identified from reading through Hardware spec, discussions with Architects/ FW Developers), so BIOS/FW Developers can can test their software on a pre-si platform, well before the actual hardware is manufactured.
  • Trained and mentored 3 members of the team on disaggregated SoC architecture and its influence on PM domain, and helped them towards achieving level 2 debug competency by running Debug Hour and PM study group on bi-weekly basis.

Software Development and Testing Intern

Ansys
08.2020 - 12.2020
  • Worked as a part of the EBU R&D team, developed & tested Maxwell 2D/3D, RmXprt and Aphi Solvers
  • Worked on Comsol Research papers to develop multiphysics FEA models and developed test cases for Maxwell AC solvers which were then added to the PyTest regression suite.

Mobile Testing Intern

PhysIQ
05.2020 - 08.2020
  • Responsible for all stages of testing for Android app and contributed to the automation test suites written in Kotlin using Espresso test framework
  • Built a mock-server in SpringBoot to test the API interaction with the app, which greatly reduced the time required to test and helped in automation tests.

Teaching Assistant

Illinois Institute Of Technology
08.2019 - 05.2020
  • Assisted teacher with lesson preparation, curriculum implementation, graded assignments and maintained routine student records for class of 64 for ECE-218: Digital Systems course.

Quality Engineer

Sunquest Information Systems
01.2017 - 07.2019
  • Scrum master for the Sunquest UI-Framework Product Development team
  • Developed and tested reusable component test library which is technology-agnostic and can be plugged into multiple applications for testing & development and was hosted in a CICT environment called TestHarness
  • Played a major role in standardizing the testing, documentation, requirement gathering and achieving CICD for the team, for which I was awarded Pixel Award for my contribution to the company.

Education

Master of Science in Electrical and Computer Engineering -

Illinois Institute of Technology
Chicago, IL
05.2021

Bachelor of Engineering in Electrical & Electronics Engineering -

Visvesvaraya Technological University
Bangalore, India
04.2016

Skills

      Tools: WinDbg, Acute Travel Logic Analyser,MemTest, Oscilloscope (MSO/DSO),Solar, ISCT, PTAT, SoCwatch, WhitePearl, Modern Standby Sleep Study, ETL traces, MATLAB, ,Simulink,Xilinx Vivado,ModelSim,Arduino IDE, RaspberryPi

        Programming: Python 30, C ,VHDL, Verilog, HDL, Javascript, TypeScript

Projects

  • Smart hub for IoT(Spring 2021):

Built a smart hub to control IoT simulator via Web pages using the HTTP & MQTT protocol which is supported by a Spring Boot application to provide RESTful services for the frontend

  • Automatic Vehicle Accident Alert System Using IoT (Summer 2020):

Autonomous emergency alert system, centered on IoT core with ArduinoUNO, RaspberryPI, variety of sensors, GPS module. The alert notification is transmitted via AWS cloud platform.

  • RTL Power Reduction using Power Gating (Fall 2020):

Implemented different Clock Gating techniques to reduce power at the RTL design and conducted formal verification to verify the modification and also performed the synthesis and power estimation

  • 5-Stage Pipelined MIPS Processor (Fall 2019):

It is a 32 bit MIPS processor implemented in VHDL and synthesized with the Xilinx Vivado program, based on the 5 stage pipeline.

Awards

WSE Superstar Award

  • Q4'23 : First time dNPU feature integrated and released to Microsoft
  • Q3'23: Integration of new features & OS build between MTL QS to PV
  • Q2'23: Meteor Lake - Platform Stability with Zero DPMO

WSE Innovation Award

  • Q3'23: BIOS Configuration with XML CLI for modifying BIOS settings

Workauthorization

On H1B

Timeline

System Software Validation Engineer

Intel
07.2021 - Current

Software Development and Testing Intern

Ansys
08.2020 - 12.2020

Mobile Testing Intern

PhysIQ
05.2020 - 08.2020

Teaching Assistant

Illinois Institute Of Technology
08.2019 - 05.2020

Quality Engineer

Sunquest Information Systems
01.2017 - 07.2019

Master of Science in Electrical and Computer Engineering -

Illinois Institute of Technology

Bachelor of Engineering in Electrical & Electronics Engineering -

Visvesvaraya Technological University

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