Summary
Overview
Work History
Education
Skills
Projects
Timeline
Generic

Kattubadi Sanjari

Brookyln,NY

Summary

An ambitious computer engineer skilled in computer architecture, RTL design, and FPGA development, proficient in multiple programming languages and EDA tools. Keen to apply extensive education and expertise in product development, with a focus on root cause analysis. Dedicated to being a valuable team player in a dynamic environment, experienced in utilizing cutting-edge technologies and effective collaboration for successful project outcomes.

Overview

2
2
years of professional experience

Work History

Back-End Developer

Prodapt Solutions
06.2021 - 12.2022
  • Served as a front-end developer for Verizon's billing architecture, utilizing the SingleView tool
  • This project involved working with a coding language that combined elements of C, C++, and Java.
  • Contributed ideas and suggestions in team meetings and delivered updates on deadlines, designs, and enhancements.
  • Authored code fixes and enhancements for inclusion in future code releases and patches.

Intern

Entuple Technologies
07.2020 - 09.2020
  • Analyzed problems and worked with teams to develop solutions for Digital Design using System Verilog
  • Sorted and organized files, spreadsheets, and reports.
  • Participated in workshops and presentations related to projects to gain deep knowledge on Hardware Design.


Education

Master of Science - Computer Engineering

New York University
New York, NY
12.2024

Bachelor of Engineering - Electronics and Communication Engineering

KNS Institute of Technology
07.2021

Skills

  • Synthesis
  • Object-Oriented Programming
  • Xilinx Vivado
  • Cadence Virtuoso
  • Synopsys Verdi
  • SingleView
  • Visual Studio
  • C
  • C
  • Java
  • Python
  • Verilog
  • System Verilog
  • VHDL
  • MATLAB
  • Embedded C
  • Linux
  • Analytical Thinking and Problem Solving

Projects

RISC-V Simulator


The project's objective is to create an interpreter for the RISC-V instruction set architecture, effectively mimicking the operations, and managing the data of the processor's registers and memory. The option was given to use either Python, favored for its straight forward syntax and quick development cycle, or C++, known for its efficiency and speed, which are vital for interpreter performance. Python was selected for the implementation.


Multi-Cycle RISC-V Processor


The NYU-646-RV32I Processor, a 32-bit processor crafted in Verilog, has been developed to execute a subset of the RISC-VRV32I instruction set. Designed to operate a range of programs,the processor is fully operational on FPGA hardware. Its architecture facilitates three core instruction categories: computational, for register operations; load/store, for memory-register data movement; and control flow, governing code navigation through jumps and branches


Accelerometer and Gyro-based Hand Movement Sequence Recorder


The project captures and records intricate hand movements in real-time using accelerometer and gyroscope sensors. It provides precise3D hand movement data with versatile applications in VR, AR, sign language interpretation, and gesture-based controls. The user-friendly interface facilitates data accessibility and future expandability, making it a valuable tool in various domains.


Real-Time Traffic Light Control System


The "Real-Time Traffic Light Control System" optimizes traffic flow through dynamic control of traffic lights based on real-time data analysis. It reduces congestion, prioritizes emergency vehicles, and adapts to changing traffic conditions, enhancing urban mobility and efficiency.

Timeline

Back-End Developer

Prodapt Solutions
06.2021 - 12.2022

Intern

Entuple Technologies
07.2020 - 09.2020

Master of Science - Computer Engineering

New York University

Bachelor of Engineering - Electronics and Communication Engineering

KNS Institute of Technology
Kattubadi Sanjari