Overview
Work History
Education
Skills
Language Level
Timeline
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LI XUNYU

Riverside,CA

Overview

4
4
years of professional experience

Work History

ESD Designer

GLOBALFOUNDRIES
Essex Junction, VT
05.2022 - 12.2022
  • Using TCAD software to design the structure of Bi-SCR (bi-directional silicon controlled rectifier), in order to get flat CV-curve.
  • Based on Verilog-A in Cadence software, extract the structure from TCAD to Cadence, aim to find small harmonic distortions.
  • Conclude the work and make a report.

03.2020 - 05.2020
  • Aimed to design a good operational amplifier structure with high gain, wide bandwidth, good stability and fast settling time to improve the accuracy and processing speed of switched-capacitor structure
  • Applied the CMOS analog integrated circuit design theory to design the switching capacitors and the fully differential operational amplifiers with Cadence based on the 0.18-micron process
  • Conducted analysis and simulation on the designed structures, obtained the transient characteristic parameters of DC and AC, improved the structures to meet the set time and linearity requirements
  • Compared the two structures' simulation results to choose a better operational amplifier with greater performance in gain, phase margin, unit gain bandwidth, switching capacitance setup time, linearity, etc; concluded a research paper.

03.2020 - 05.2020
  • Designed the 2-stage differential operational amplifier with Cadence, simulated and optimized the frequency characteristic to meet the design requirement
  • Designed a common mode feedback circuit (CMFB), verified its function and loop stability
  • Completed the layout design of the 2-stage differential operational amplifier.

10.2019 - 12.2019
  • Designed the parts of SRAM with Cadence, including the line decoder, read-write control, sensor amplifier, selector, etc.; integrated each component to a complete circuit and carried out a simulation experiment
  • Completed the layout of SRAM structure and each component, integrated each layout, optimized the structure to reduce the occupied area, adopted the reasonable methods to complete the routing layout to guarantee the DRC and LVS results
  • Mainly responsible for the row decoder, the column decoder, the read/write circuits and the combination of all circuits.

10.2018 - 05.2019
  • Studied the basic principles and design methods of different filters, researched and analyzed the basic structure and design methods of operational amplifiers
  • Analyzed and designed the feasible operational amplifier structure with the knowledge of CMOS analog ICdesign
  • Designed the circuit model of the 2-stage active RC filter on Cadence, built up the circuit structure of active power filter with the designed operational amplifier
  • Tested and optimized the parameters of MOS tube and common components by Cadence simulation.

Analog Design Engineer

Semiment Electronic Technology Ltd. (Shanghai)
07.2018 - 08.2018
  • Disassembled the chip layout and analyzed the structure and each part
  • Analyzed the band gap reference and LDO part structure, designed the circuit structure with Cadence, optimized the part structure by changing the corresponding parameters to meet the chip performance requirements
  • Conducted simulation and analysis on the function of each component, proceeded necessary modification to reach the targets required, provided a reference voltage for other parts of the circuit
  • Involved in the design of the layout and routing layout of this part, as well as the testing and packaging.

Semiment Electronic Technology Ltd. (Shanghai)
08.2017
  • Disassembled the chip layout and analyzed the structure and each part
  • Analyzed the band gap reference and LDO part structure, designed the circuit structure with Cadence, optimized the part structure by changing the corresponding parameters to meet the chip performance requirements
  • Conducted simulation and analysis on the function of each component, proceeded necessary modification to reach the targets required, provided a reference voltage for other parts of the circuit
  • Involved in the design of the layout and routing layout of this part, as well as the testing and packaging.

Education

Master of Science in Electrical and Computer Engineering -

University of Florida
06-2021

Bachelor of Engineering in Integrated Circuit Design and Integration System -

Xidian University
07-2019

Doctor of Philosophy in Electrical Engineering -

University of California, Riverside

Skills

  • Self Motivation
  • Simulations
  • Problem-Solving
  • Adaptability and Flexibility
  • Effective Communication
  • Time management abilities

Language Level

96 (L-23, R-30, W-20, S-23), 323 (V154/Q169/AW3.0)

Timeline

ESD Designer

GLOBALFOUNDRIES
05.2022 - 12.2022

03.2020 - 05.2020

03.2020 - 05.2020

10.2019 - 12.2019

10.2018 - 05.2019

Analog Design Engineer

Semiment Electronic Technology Ltd. (Shanghai)
07.2018 - 08.2018

Semiment Electronic Technology Ltd. (Shanghai)
08.2017

Master of Science in Electrical and Computer Engineering -

University of Florida

Bachelor of Engineering in Integrated Circuit Design and Integration System -

Xidian University

Doctor of Philosophy in Electrical Engineering -

University of California, Riverside
LI XUNYU