Madhav Raj
San Jose,CA
Summary
Results-driven graduate engineer specializing in automation and system optimization. Proven track record in developing frameworks for SoC integration and verification, implementing protocols like I2C and PCIe, while enhancing team collaboration to drive efficiency and innovation.
Overview
3
3
years of professional experience
Work History
Design Engineer
ARM Embedded Technologies
Bengaluru, Karnataka
07.2023 - 07.2025
- Developed automation frameworks for integration and verification of SoC/CSS platforms
- Utilized ARM Cortex processors, DSU, IMC, Synopsys DMC, and PCIE in platform development
- Optimized system performance by balancing processing power, energy efficiency, and integration
- Implemented industry standard protocols such as I2C, UART, SPI, AXI, and CHI for system integration and verification
- Researched and implemented trends in SoC technology including AI integration and ultra-low-power designs
- Collaborated with team members to explore heterogeneous computing solutions for future projects
- Participated in continuous improvement initiatives to enhance integration/verification processes and workflows.
Intern
ARM Embedded Technologies
Bengaluru
01.2023 - 07.2023
- Automated various workflows to optimize efficiency and reduce manual effort
- Devised and implemented automation techniques to improve processes
- Created sophisticated algorithms for predictive maintenance
- Implemented process automation to manage repetitive duties
- Advocated for sustainable practices by reducing energy and refuse consumption
- Enhanced productivity by freeing up employees for more intricate problem-solving activities
Education
Master of Science - Electrical Engineering
San Jose State University
San Jose, CA05-2027
B.E. - Electronics and Communication Engineering
M.S. Ramaiah Institute of Technology
Bengaluru, Karnataka06.2023
12th Grade - CBSE
National Public School
Bengaluru, Karnataka04.2019
Skills
- Digital hardware design
- Verification and validation
- Verilog and SystemVerilog
- Interconnect architecture
- Arm Cortex processors
- Design and system integration
- PCIe and CHI protocols
- AXI and APB interfaces
- SPI and UART communication
- Mentor QuestaSim tools
- Veloce simulation platform
- Synopsys Zebu environment
- VCS simulation tools
- Microprocessor design
- Pipelining techniques
- Cache management strategies
- Computer architecture principles
- Python programming language
- Perl scripting language
- C programming language
- C development skills
- PHP web development
- Automation methodologies
Projects
- Final year team project on OFDM Channel Estimation utilizing Deep Learning using Matlab and python, 2023
- Created a layout for a 4x4 keypad using DSCH and microwind, 2022
- IoT Temperature and Moisture Sensor with Phone notifications, 2020
- Built a smartwatch from scratch using Arduino, 2019
Posters
- Solution Explorer - Guided Platform for Exploratory and Nimble System Generator - ARM REC 2024, A tool to generate highly configurable, multiple sub-systems and solution-based platforms for IP level functional validation, performance analysis and software readiness. The design portfolio includes A, R and M Class Cores, GPU, system interconnects, memory controllers, and system controllers based on various hardware and software configurations.
- Automated Deployment Pipeline: A Precision Workflow - ARM Quality Summit 2024, The Release automation flow is a single command flow that helps with the entire release process of the SoC/CSS from stitching SoC RTL all the way up to its compile and run post release. It does everything from tag creation to OOB validations on the given tag. The entire process of RTL generation all the way to creating a confluence page on it has been automated using a single push button flow.
Affiliations
- Math instructor for Grade 11 Students of underprivileged origins, Aakanksha NGO, 04/24 - 03/25
- Participated in a drive to raise awareness on sanitation, Marshal, 2022
- Blood donor at Blood Donation Camp, MSRIT, 2019, 2021, 2022
- Participated in the 'Milesforsmiles' marathon who aimed to contribute food to an orphanage, Bengaluru, 2022
- Captain, Athena House basketball team, NPS, 2018
- Member of Green Committee, Godrej Woodsman Estate, Bangalore, 2015
Accomplishments
- Ranked 1st in my batch in 12th boards in a batch of 100 students, 2019
- Ranked 1994 in Karnataka CET out of about 1.3 lakh students, 2019
- Secured top 95.3 percentile in JEE mains out of about 10 lakh students, 2019
Timeline
Design Engineer
ARM Embedded Technologies
07.2023 - 07.2025
Intern
ARM Embedded Technologies
01.2023 - 07.2023
Master of Science - Electrical Engineering
San Jose State University
B.E. - Electronics and Communication Engineering
M.S. Ramaiah Institute of Technology
12th Grade - CBSE
National Public School