Digital Alarm Clock using FPGA
Verification of Serial Peripheral Interface
SystemVerilog Verification Environment/TestBench for Memory Model
Design of Serial Peripheral Interface
SOC Design Engineer at Intel Technology India (P) LtdSOC Design Engineer at Intel Technology India (P) Ltd
SoC Physical Design Domain Lead at Intel CorpSoC Physical Design Domain Lead at Intel Corp
AMS VERIFICATION INTERN at NXP SemiconductorAMS VERIFICATION INTERN at NXP Semiconductor
Senior Consulting Physical Design Engineer at MetaSenior Consulting Physical Design Engineer at Meta