NEH PATEL
San Jose,California
Overview
2
2
years of professional experience
Work History
SOC Verification and Test Engineer
AMD\Xilinx
01.2022 - Current
- Processor subsystem team for the FPGA.
- Generating design using Vivado, integrating patterns, and debugging the issues on the bench.
- Scripting automation tasks for the team.
- Debugging Setup, Hold time, temperature, and voltage issues in the pattern.
- Responsible for integrating FT patterns with the FPGA.
Digital Test Development Intern
Analog Devices
06.2021 - 08.2021
- JTAG Validation on the Teradyne’s Ultraflex Tester
- Generated patterns from the wgl files and debugged the failing patterns
- SPI Functional Testing and Characterization using Ultraflex Tester
- Generated Tester patterns and checked the output files using waveform tools.
Education
MS - Electrical Engineering
San Jose State University
2021
MS - Electrical Engineering
San Francisco State University
2020
BE - Electrical Engineering
Gujarat Technological University
2019
Skills
- Static timing analysis
- Computer Architecture and Organization
- Digital Logic Design
- CMOS
- Low Power Optimization and Design
- VLSI Design
- Verilog
- Python
- Visual Basic
- System Verilog
Projects
Digital Alarm Clock using FPGA
- Developed a Finite State Machine-based clock using Verilog HDL on Terasic DE10 Lite.
Verification of Serial Peripheral Interface
- Verified SPI protocol using System Verilog for single and multiple slaves.
- Troubleshot and debugged issues in the verification code, gaining a strong understanding of verification concepts using SV.
SystemVerilog Verification Environment/TestBench for Memory Model
- Created a verification plan.
- Designed testbench hierarchy and architecture.
- Developed the verification environment/testbench.
Design of Serial Peripheral Interface
- Designed SPI for ADC interface on the FPGA.
Timeline
SOC Verification and Test Engineer
AMD\Xilinx
01.2022 - Current
Digital Test Development Intern
Analog Devices
06.2021 - 08.2021
MS - Electrical Engineering
San Jose State University
MS - Electrical Engineering
San Francisco State University
BE - Electrical Engineering
Gujarat Technological University
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